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Method for making solder mask layer

A production method and solder mask technology, which are applied in the manufacture of printed circuits, coating of non-metallic protective layers, secondary processing of printed circuits, etc., can solve the problems of easy falling off of solder mask bridges, save production costs and reduce scrap rate. , the effect of increasing the alignment accuracy

Inactive Publication Date: 2016-01-06
JIANGMEN SUNTAK CIRCUIT TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The present invention aims at the problems that the existing LineMask process makes the solder resist layer on the thick copper plate, so that the solder resist layer is easily covered on the pad and the solder resist bridge is easy to fall off, and the LineMask process is optimized to provide a solder resist The method of making the solder resist layer covering the pad, and this method can also make a strong solder resist bridge on the thick copper board

Method used

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Examples

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Embodiment

[0020] This embodiment provides a method for manufacturing a solder resist layer, especially a method for manufacturing a solder resist layer on a circuit board with a copper thickness of 130 μm. Specific steps are as follows:

[0021] (1) Production board with outer circuit

[0022] According to the existing technology, the substrate is made into a production board with an outer circuit by successively cutting the material → negative film process to make the inner layer circuit → pressing → drilling → sinking copper → full board electroplating → positive film process to make the outer layer circuit. details as follows:

[0023] a. Cutting: Cut out the core board according to the panel size 520mm×620mm, and the thickness of the core board is 0.5mmH / H.

[0024] b. Inner layer circuit (negative film process): produced by vertical coating machine, the film thickness is controlled to 8μm, and a fully automatic exposure machine is used to complete the exposure of the inner layer ...

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Abstract

The invention relates to the technical field of circuit board production, and specifically relates to a method for making a solder mask layer. Exposure is carried out by adopting films of different coefficients in primary resistance welding and secondary resistance welding to increase the alignment accuracy of solder mask ink. Therefore, the problem that a solder mask layer deflects onto a pad is reduced, inaccurate alignment of solder mask ink during secondary resistance welding due to sheet deformation caused by baking under high temperature during primary resistance welding is overcome, the scrap rate caused by film coefficient is reduced, and the cost of production is decreased. Moreover, by adopting the method, the problem that a resistance welding bridge is easy to fall off due to excessive lateral erosion caused by the thickness of resistance welding can be solved, and for a production board with the thickness of copper greater than 120 microns, a resistance welding bridge can be retained on a positive line film.

Description

technical field [0001] The invention relates to the technical field of circuit board production, in particular to a method for manufacturing a solder resist layer. Background technique [0002] The production process of circuit boards generally includes material cutting → negative film making inner layer circuit → pressing → drilling → copper sinking → full board electroplating → positive film process to make outer layer circuit → making solder mask layer → surface treatment → forming. Making the solder resist layer means that on the production board after the outer circuit is produced, except for the pads and holes that need to be soldered, other areas are coated with a layer of solder resist ink and cured, so that the PCB Play the role of protection, welding and so on. The solder resist ink solidified between one window of the component on the PCB and another window is the solder resist bridge, which generally refers to the solder resist strip between the relatively dense...

Claims

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Application Information

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IPC IPC(8): H05K3/28
CPCH05K3/282H05K2203/1377
Inventor 夏建义白会斌刘名启刘密
Owner JIANGMEN SUNTAK CIRCUIT TECH
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