Method of manufacturing groove-type VDMOS and the groove-type VDMOS

Abstract

The invention provides a method of manufacturing a groove-type VDMOS and the groove-type VDMOS. The method comprises the following steps of making a groove on an epitaxial layer surface of a substrate; growing an oxide layer on the epitaxial layer surface where the groove is formed; growing a silicon nitride layer on a surface of the oxide layer; etching and removing the silicon nitride layer which is outside the groove and is above the oxide layer and etching and removing all the oxide layer outside the groove and the oxide layer on a groove side wall; growing a gate oxide on a periphery edge of the groove and the groove side wall, wherein the gate oxide reaches the oxide layer on a groove bottom and a gap exists between the gate oxide in the groove and the silicon nitride layer; growing a polysilicon layer in the gap and on the gate oxide outside the groove, etching and removing the polysilicon layer outside the groove, wherein the polysilicon layer completely fills in the gap; forming a P-body region; forming a N+ source region; growing a dielectric layer above the groove and forming a contact hole; and forming a metal layer. By using the groove-type VDMOS manufactured through the method, a gate-drain capacitance is avoided and an influence on a VDMOS dynamic characteristic is reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductor chip manufacturing technology, in particular to a method for producing trench VDMOS and the trench VDMOS. Background technique [0002] Such as figure 1 As shown, in the structure of the existing trench type VDMOS (vertical double diffused metal oxide semiconductor transistor), the capacitance between the gate and the drain is mainly due to the gap between the gate polysilicon / gate oxide layer / epitaxial layer at the bottom of the trench This capacitance will affect the dynamic characteristics of VDMOS. In order to reduce this capacitance, one method is to increase the thickness of the gate oxide layer, but this will affect other parameters of VDMOS, such as threshold voltage. [0003] The manufacturing process of conventional trench VDMOS is as follows: [0004] Step 1, on the basis of the N-type epitaxial layer and the N-type substrate, a trench is first grown, such as figure 2 shown; ...

AI Technical Summary

Problems solved by technology

[0011] The technical problem to be solved by the present invention is to provide a method for producing trench type VDMOS and trench type VDMOS, in order to solve the problem of the gate polysilicon / gate oxide layer at the bottom of the trench in the structure of the existing trench type VDMOS The parasitic capacitance between the epitaxial layers will cause capacitance between the gate and drain, which will affect the dynamic characteristics of VDMOS

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