A method for raising the process window of through-hole layer
A process window and through-hole layer technology, which is applied in the manufacture of electrical components, electrical solid devices, semiconductor/solid devices, etc., can solve the problems of limited optical enhancement, achieve the effect of enhancing the analysis ability and improving the process window
Active Publication Date: 2018-05-29
SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT
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Problems solved by technology
In other words, this type of sub-resolution pattern has very limited optical enhancement for vias, especially relatively isolated vias.
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[0026] The specific embodiment of the present invention will be further described in detail below in conjunction with the accompanying drawings.
[0027] It should be noted that, in the following specific embodiments, when describing the embodiments of the present invention in detail, in order to clearly show the structure of the present invention for the convenience of description, the structures in the drawings are not drawn according to the general scale, and are drawn Partial magnification, deformation and simplification are included, therefore, it should be avoided to be interpreted as a limitation of the present invention.
[0028] In the following specific embodiments of the present invention, please refer to figure 2 , figure 2 It is a flow chart of a method for improving the process window of the through-hole layer in the present invention; at the same time, please refer to image 3 as well as Figure 4-Figure 7 , image 3 is a preferred embodiment of the presen...
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The invention discloses a method for improving a through-hole layer technical window. First of all, an area with low figure density is sought on an a through-hole layer layout, a redundancy through-hole figure is added to an empty area unaffecting actual circuit design, then, a through hole upper-layer metal layer figure is photoetched and etched, the through hole upper-layer metal layer figure is transferred to a hard mask layer, a through-hole figure is photoetched and etched, the through-hole figure is transferred to a dielectric layer, the redundancy through-hole figure is blocked from transfer to the dielectric layer by use of the hard mask layer, and finally, the through-hole figure and the metal-layer figure are transferred to a silicon chip through one-time etching. According to the invention, through adding the redundancy through-hole figure into a low-density area of the through-hole figure, the analyzing capability of the through-hole figure is enhanced, the technical window of the through-hole figure is improved, and the added redundancy figure does not affect an actual circuit.
Description
technical field [0001] The invention relates to the technical field of semiconductors, and more specifically, to a method for improving the process window of a via layer. Background technique [0002] With the continuous shrinking of the interconnect size, the critical dimension of the pattern has gradually reached the limit of the single photolithography technology, and the process window of the photolithography is getting smaller and smaller. For example, in the process of forming the dual damascene structure, in order to obtain the size of the through hole conforming to the design rules, a self-aligned through hole process is usually used to form the through hole layer. In the self-aligned via process, the size of the via is not determined by the layout design size of the via, but by the line width of the upper metal layer connected to the via. In other words, in order to obtain a larger through-hole lithography process window, the lithographic critical dimension of the ...
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IPC IPC(8): H01L21/768
CPCH01L21/76807H01L21/76816H01L2221/101H01L2221/1015
Inventor 卢意飞袁伟李铭胡红梅
Owner SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT