Array substrate and manufacturing method thereof

Abstract

The invention discloses an array substrate and a manufacturing method thereof. The array substrate includes: a glass substrate, on which a light-shielding metal layer and a buffer layer are sequentially arranged; a thin-film transistor layer, arranged on the buffer layer, and the thin-film transistor layer includes a gate insulating layer and a thin-film transistor, wherein the thin-film transistor is located above the light-shielding metal layer; layer, an organic transparent layer, arranged on the thin film transistor layer in sequence; the pixel electrode layer, the pixel electrode layer is connected to the source / drain of the thin film transistor through the first through hole; the touch electrode layer, the touch electrode layer through the second through hole It is connected with the light-shielding metal layer; the passivation layer is arranged between the pixel electrode layer and the touch electrode layer. Through the above methods, the present invention can simplify the manufacture and effectively reduce the coupling capacitance between the touch electrodes and the signal lines.

Description

technical field [0001] The invention relates to the technical field of liquid crystal display, in particular to an array substrate and a manufacturing method thereof. Background technique [0002] The currently developed self-contained embedded (Incell Touch) touch technology is to divide the common (Com) electrodes in the Active Area (AA) area into small blocks as touch electrodes. Each touch electrode has an Rx signal line connected to a touch chip (IC) to receive touch signals. At present, Low Temperature Poly-silicon (LTPS) technology commonly uses top-gate thin film transistors (Thin Film Transistor, TFT). In order to prevent excessive leakage of TFT devices in the AA region, a metal layer is generally used to shield the channel below the channel. , That is, we often say that the light-shielding metal (LSM) layer. [0003] In the existing self-contained Incell design, such as figure 1 As shown, a metal shielding layer 11 and a buffer layer 12 are sequentially grown o...

AI Technical Summary

Problems solved by technology

The newly added two processes not only change the CMOS LTPS process with 12 masks into 14 masks, but also because the coupling capacitance Cst between the touch electrodes and the Rx signal lines is not too small, the third metal layer 19 and the touch electrodes 16 The thickness of the insulating layer between them cannot be made too thin, so the coupling capacitance between the touch electrode 16 and the Rx signal line of other electrodes is difficult to be made small.

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