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Sensitive amplifier and memory

A sensitive amplifier and signal technology, which is applied in the field of sensitive amplifier and memory, can solve the problem that the storage unit is susceptible to interference, and achieve the effect of avoiding interference

Active Publication Date: 2016-04-20
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, with prior art sense amplifiers, memory cells are easily disturbed by

Method used

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  • Sensitive amplifier and memory

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Embodiment Construction

[0033] In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions and constructions are not described in detail since they would obscure the invention with unnecessary detail. It should be appreciated that in the development of any actual embodiment, numerous implementation details must be worked out to achieve the developer's specific goals, such as changing from one embodiment to another in accordance with system-related or business-related constraints. Additionally, it should be recognized that such a development effort might be complex and time consuming, but would nevertheless be merely a routine undertaking for those skilled in the art.

[0034] In the following paragraphs the invention is described more specifically by way of example with reference to the accompanying drawings. Advantages and features of the present invention will be apparent from the following description and claims. It s...

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Abstract

The present invention discloses a sensitive amplifier, which comprises a control unit, a transformer, a first current mirror unit, a first voltage dividing unit, a second voltage dividing unit, a second current mirror unit, a third voltage dividing unit and a fourth voltage dividing unit, wherein the control unit receives an input signal and a clock signal, the control unit outputs a control signal the same as the input signal when the clock signal is at a high potential, and the control unit does not output the control signal and the first voltage dividing unit, the second voltage dividing unit, the third voltage dividing unit and the fourth voltage dividing unit do not work when the clock signal is at a low potential so as to avoid interference between memory units. The present invention further provides a memory containing sensitive amplifier.

Description

technical field [0001] The invention relates to the technical field of memory circuits, in particular to a sense amplifier and a memory. Background technique [0002] Static random access memory (SRAM, StaticRandomAccessMemory) is embedded in almost all large-scale integrated circuits, and plays a key role in applications requiring high speed, high integration, low power consumption, low voltage, low cost, and short cycle effect. SRAMs can include different numbers of transistors and are often named according to the number of transistors, eg, 6-transistor (6-T) SRAM, 8-transistor (8-T) SRAM, and so on. [0003] SRAM mainly includes two parts: storage array and peripheral auxiliary circuit. The memory array is the core component of SRAM, which plays the role of storing data; the structure of the memory array is relatively fixed, and its performance is generally determined by the level of integrated circuit manufacturing technology. Peripheral auxiliary circuits include sen...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/413
Inventor 仲纪者
Owner SEMICON MFG INT (SHANGHAI) CORP