A kind of preparation method of red and yellow light emitting diode epitaxial wafer and chip
A technology of light-emitting diodes and epitaxial wafers, which is applied to semiconductor devices, electrical components, circuits, etc., can solve problems such as increasing production costs, mismatching of blue and green LED chips, and reducing product yield, so as to achieve low production costs and avoid unsatisfactory production. Matching, the effect of high product yield
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0030] An embodiment of the present invention provides a red and yellow light-emitting diode epitaxial wafer, see figure 1 , the LED epitaxial wafer includes a P-type substrate 1, and a P-type buffer layer 2, a P-type sacrificial layer 3, a P-type ohmic contact layer 4, and a P-type highly doped layer 5 stacked on the P-type substrate 1 in sequence. , P-type current spreading layer 6 , P-type confining layer 7 , multiple quantum well layer 8 , N-type confining layer 9 , N-type current spreading layer 10 , and N-type highly doped layer 11 .
[0031] In this embodiment, the P-type substrate 1 is a GaAs substrate, the P-type buffer layer 2 is a GaAs layer, the P-type sacrificial layer 3 is a GaInP layer, the P-type ohmic contact layer 4 is a GaAs layer, and the P-type highly doped layer 5 and the P-type current spreading layer 6 are AlGaAs layers, the P-type confinement layer 7 is an AlInP layer, and the multi-quantum well layer 8 is formed by alternating growth of quantum well l...
Embodiment 2
[0056] The embodiment of the present invention provides a method for preparing a light-emitting diode chip, the light-emitting diode chip is prepared from the light-emitting diode epitaxial wafer provided in the first embodiment, see figure 2 , the preparation method comprises:
[0057] Step 201: sequentially grow a P-type buffer layer, a P-type sacrificial layer, a P-type ohmic contact layer, a P-type highly doped layer, a P-type current spreading layer, a P-type confinement layer, a multi-quantum well layer, N-type confinement layer, N-type current spreading layer, N-type highly doped layer.
[0058] Figure 3a It is a schematic structural diagram of the LED chip after step 201 is performed. Among them, 1 is a P-type substrate, 2 is a P-type buffer layer, 3 is a P-type sacrificial layer, 4 is a P-type ohmic contact layer, 5 is a P-type highly doped layer, 6 is a P-type current spreading layer, 7 is a P-type confinement layer, 8 is a multi-quantum well layer, 9 is an N-ty...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More - R&D
- Intellectual Property
- Life Sciences
- Materials
- Tech Scout
- Unparalleled Data Quality
- Higher Quality Content
- 60% Fewer Hallucinations
Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.
© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com



