Level offset unit, level offset circuit and drive method, and grid drive circuit

A technology of level shifting and driving power, applied in electrical components, logic circuits, logic circuit interface devices, etc., can solve problems such as safety hazards, scrapped display devices, and gate driver current burning, and achieve the effect of avoiding burning

Active Publication Date: 2016-06-01
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In actual use, due to the limitation of the wiring space, the clock signal line is likely to cross between lines during wiring. Once a short circuit occurs at the crossing position of the line and the line, the clock signal will be short-circuited during display. Its amplitude is large, resulting in a large short-circuit current, which will cause the current in the gate driver to burn out, thereby causing the display device to be scrapped, and even bring about safety hazards.

Method used

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  • Level offset unit, level offset circuit and drive method, and grid drive circuit
  • Level offset unit, level offset circuit and drive method, and grid drive circuit
  • Level offset unit, level offset circuit and drive method, and grid drive circuit

Examples

Experimental program
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Embodiment 1

[0049] to combine figure 1 As shown, this embodiment provides a level shift unit, including: a logic control module 1, an output module 2, an output control module 3, and a feedback module 4; wherein, the logic control module 1 is connected to a power supply, a drive power , the input signal terminal CLK_IN, and the output module 2, which are used to generate a control signal opposite to the input signal, and select the logic level signal input by the drive power supply corresponding to the polarity of the power supply according to the control signal, and convert the The logic level signal is transmitted to the output module 2; the feedback module 4 is connected to the enable signal terminal EN, the signal output terminal CLK_OUT, and the output control module 3, for according to the enable signal terminal EN and the The signal input by the signal output terminal CLK_OUT outputs a feedback signal and transmits it to the output control module 3; the output control module 3 is c...

Embodiment 2

[0067] Such as figure 1 and 3 As shown, this embodiment provides a level shifting circuit, which includes a plurality of level shifting units described in Embodiment 1.

[0068] Wherein, when the feedback module 4 includes a voltage comparator, an OR gate OR and a second inverter N2, the preferred level shifting circuit in this embodiment also includes a NOR gate NOR; wherein, the NOR gate NOR One input terminal is connected to the output terminal of a voltage comparator of the feedback module 4 , and the output terminal is connected to the first input terminal of the OR gate OR of each feedback module 4 .

[0069] Specifically, the enable signal terminal EN inputs a high-level signal at power-on, and the enable signal terminal EN inputs a low-level signal at other times. In this implementation, at the time of power-on, one input terminal (second input terminal) of the OR gate OR inputs a high level enable signal, and the other input terminal (first input terminal) no matter...

Embodiment 3

[0072] This embodiment provides a method for driving a level shift circuit, wherein the level shift circuit includes the level shift unit in Embodiment 1 of multiple embodiments. The driving method specifically includes the following steps.

[0073] refer to figure 1 and 4 As shown, the power-on output stage: If the signal VIO=3.3V input by the working voltage terminal VIO of the power supply is turned on, the working ground terminal is grounded; the signal VGH=30V input by the high-level signal terminal VGH of the drive power supply, low-level The signal VGL input by the signal terminal VGL=-8V.

[0074] At the time of power-on, the enable signal terminal EN inputs a high-level signal, and the enable signal terminal EN inputs a low-level signal at other times. Therefore, when the power is turned on, one input of the OR gate OR inputs a high-level enable signal, and the other port no matter whether the input is high-level or low-level, at this time the output of the OR gate...

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PUM

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Abstract

The invention provides a level offset unit, a level offset circuit and drive method, and a grid drive circuit, belonging to the display technology field. The level offset unit comprises a logic control module, an output module, an output control module and a feedback module, wherein the logic control module is connected to a start up power supply, a driving power supply, an input signal terminal and an output module; the feedback module is connected to an enabling signal terminal, a signal output terminal and an output control module; the output control module is connected to the output module and the driving power supply; and the output module is connected to the signal output terminal. The feedback module of the level offset unit controls the output module to start up and switch off through the enabling terminal and the signal input terminal. If the signals outputted by the two level offset units are short circuited, the feedback module controls the output control module of the level offset circuit to be disconnected, so that the output module outputs the high impedance so as to avoid the burning of the gate driver, which causes the potential safety hazard.

Description

technical field [0001] The invention belongs to the field of display technology, and in particular relates to a level shifting unit, a level shifting circuit, a driving method thereof, and a gate driving circuit. Background technique [0002] Currently, the most common flat panel display devices include liquid crystal display devices and organic light emitting diode display devices. The display area of ​​the flat-panel display device includes a plurality of pixel areas surrounded by cross-arranged gate lines and data lines, and a thin-film transistor for controlling display is arranged in each pixel driver; Drive to realize pixel image display. The drive unit includes a gate driver and a source driver, wherein the gate driver is used to scan and open multi-channel RGB pixels belonging to the same row in the display screen, and the source driver is used to provide display data for the opened multi-channel RGB pixels. [0003] The clock signal of the gate driver is provided ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G09G3/36G09G3/3266H03K19/0175
CPCG09G3/3266G09G3/3674H03K19/0175H03K19/017509G09G3/3225G09G3/3648G09G2310/0289G09G2320/0219H03K19/017
Inventor 张志豪孙志华马伟超张旭苏国火汪建明
Owner BOE TECH GRP CO LTD
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