Package substrate and its semiconductor package
A technology for packaging substrates and semiconductors, which is applied in semiconductor devices, semiconductor/solid-state device components, electric solid-state devices, etc.
Active Publication Date: 2018-06-22
MEDIATEK INC
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- Description
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However, such an FCCSP structure requires an additional metal cover and is therefore more expensive
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[0032] In order to make the technical problems, technical solutions and beneficial effects solved by the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.
[0033] In the following description, there may be repeated reference numerals and / or words in different embodiments. Such repetition is for simplicity and clarity of illustration only and is not intended to indicate a relationship between the various embodiments and / or the various configurations discussed.
[0034] In addition, in the following description, if it involves that the first structural feature is located on or above the second structural feature, including in different embodiments, it means that the first structural feature and the second structural feature c...
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The embodiment of the invention discloses a package substrate and semiconductor package thereof. Wherein the packaging substrate includes: a core layer having a first surface and a second surface opposite to the first surface, and the core layer has a central area and a peripheral area surrounding the central area; a group of grounding pads arranged in the central area the second surface in the area; the first power pad group is arranged on the second surface in the central area; the first block-shaped via plug is embedded in the core layer and is located in the center region, wherein the group of ground pads is commonly electrically connected to the first bulk via; and a second bulk via, embedded in the core layer and located in the central region, wherein the The first power pad group is electrically connected to the second bulk via plug. The package substrate and the semiconductor package thereof in the embodiments of the present invention have better heat dissipation, so the performance of the package structure can be improved.
Description
technical field [0001] The invention relates to the technical field of semiconductor packaging, in particular to a packaging substrate with a block-shaped via plug and a semiconductor packaging thereof. The packaging substrate has better heat dissipation capability and can effectively package integrated circuit chips or chips in operation. To dissipate heat. Background technique [0002] In recent years, the mobile communication market has continued to promote the development of the advanced semiconductor packaging industry. This is mainly due to the fact that manufacturers try their best to meet the end user's demand for mobile phone functions, performance and miniaturization. [0003] From the initial adoption of chip scale packaging (Chip Scale Packaging, CSP), followed by the demand for multi-chip packaging and package-on-package (Package-on-Package, PoP) structure manufacturing, we can get a glimpse of mobile communication market impact. This trend is most pronounced...
Claims
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IPC IPC(8): H01L23/367
CPCH01L23/367H01L23/3677H01L23/49827H01L23/49838H01L23/50H01L24/13H01L24/16H01L24/19H01L24/20H01L24/32H01L24/73H01L25/03H01L25/105H01L2224/0401H01L2224/04105H01L2224/12105H01L2224/131H01L2224/13147H01L2224/16227H01L2224/32225H01L2224/48091H01L2224/48227H01L2224/73204H01L2225/1023H01L2225/1058H01L2225/1094H01L2924/1436H01L2924/15311H01L2924/15331H01L2924/014H01L2224/16225H01L2924/00H01L23/3114H01L23/34H01L23/49811
Inventor 许文松陈泰宇
Owner MEDIATEK INC