FPGA-based binary image connected region information fast acquisition system and method

A technology for connected regions and binary images, which is applied in the field of rapid acquisition systems for the information of connected regions of binary images, can solve the problems of unsuitability for parallelization and low efficiency, and achieve the effect of real-time acquisition.

Active Publication Date: 2016-06-15
XI AN JIAOTONG UNIV
View PDF3 Cites 13 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The present invention can solve the problems of low efficiency, unsuitability for parallelization, and incapability of real-time processing of large-resolution images existing in the prior art

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • FPGA-based binary image connected region information fast acquisition system and method
  • FPGA-based binary image connected region information fast acquisition system and method
  • FPGA-based binary image connected region information fast acquisition system and method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0037] The technical scheme that the present invention implements is as follows:

[0038] 1. The image data adopts the common output format of the image sensor, that is, the frame synchronization signal, the line synchronization signal, the binary image data and the pixel synchronization clock are used as the image input signal.

[0039] 2. Effective period of the first line: Detect the run-length information of the first line of images, and store the run-length information into the on-chip storage space.

[0040]3. The valid period of the second line: Detect the run-length information of the second line of images, and store the information in the on-chip storage space; convert the run-length information of the first line into the connected area information and write it into the corresponding connected area information storage space; A run-length look-up table of one row, the run-length look-up table records the run-length information and the merging relationship between the r...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides an FPGA-based binary image connected region information fast acquisition system and a method. The method comprises the steps of adopting a frame synchronization signal, a line synchronization signal, binary image data and a pixel synchronization clock as an image input signal; detecting the run-length information of a first row of images during a first row validity duration; detecting the run-length information of a second row of images during a second row validity duration; merging the first row of the run-length information to obtain the information of a communicated region; establishing a first row run-length look-up table; detecting the run-length information of the second row of images during a third row validity duration; merging the second row of the run-length information based on the first row run-length look-up table to obtain the information of the communicated region; and establishing a second row run-length look-up table. The subsequent operation is consistent with the operation on the third row. After images are already input, the information of the communicated region can be obtained. According to the technical scheme of the invention, the pipeline operation is conducted and the parallel advantages of the FPGA are fully utilized. Meanwhile, the information of the communicated region of high-resolution images can be obtained in real time.

Description

【Technical field】 [0001] The invention provides a method for image recognition and target information extraction, in particular to an FPGA-based system and method for quickly acquiring information of a connected area of ​​a binary image. 【Background technique】 [0002] A binary image refers to an image in which each pixel is represented by "0" or "1". The connected region labeling algorithm requires that all the pixels belonging to the same connected region in the binary image are marked with unique labels, and the information such as the area of ​​the connected region and the circumscribed rectangle is counted at the same time. This process is a very important basic operation in computer vision, pattern recognition and image tracking, and has a wide range of applications. [0003] The connected area labeling is divided into two statistical results based on 4-neighborhood and 8-neighborhood. The 4-neighborhood refers to the image area composed of the target pixel and four p...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): G06T1/20G06T1/60G06T7/20
CPCG06T1/20G06T1/60G06T2200/28
Inventor 王飞张秋光贾良宇郑南宁
Owner XI AN JIAOTONG UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products