Semiconductor device and manufacturing method thereof

Abstract

The invention discloses a manufacturing method of a semiconductor device. The method comprises steps that a semiconductor substrate is provided; a first semiconductor layer and a second semiconductor layer are sequentially laminated on the semiconductor substrate, and an isolation groove is formed between the first semiconductor layer and the second semiconductor layer; a part of the first semiconductor layer is removed from the end portion of the first semiconductor layer to form an opening; the opening and the isolation groove are filled to form a first insulation layer and isolation respectively; a through etching hole is formed on the second semiconductor layer; the residual part of the first semiconductor layer is corroded through the through etching hole to form a chamber; a back gate dielectric layer and a second insulation layer are respectively formed on inner surfaces of the chamber and the etching hole, and the chamber and the etching hole are respectively filled through a conductor layer and a connection layer to form a back gate and a connection hole; subsequent device processing is carried out. Through the method, a similar SOI device with a back gate structure is realized.

Description

technical field [0001] The invention belongs to the field of semiconductor manufacturing, and in particular relates to a semiconductor device and a manufacturing method thereof. Background technique [0002] With the continuous reduction of the feature size of the device, after entering the nanometer scale, especially the size below 22nm, the problems close to the limit of semiconductor physical devices come one after another, such as capacitance loss, leakage current increase, noise promotion, latch-up effect and short channel In order to overcome these problems, SOI (Silicon-On-Insulator, Silicon-On-Insulator) technology came into being. [0003] The SOI substrate is divided into thick layer and thin layer SOI. The thickness of the top layer silicon of the thin layer SOI device is smaller than the width of the maximum depletion layer under the gate. When the thickness of the top layer silicon becomes thinner, the device is partially depleted (PartiallyDepletion) to fully d...

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Problems solved by technology

[0004] However, the current cost of SOI substrates is relatively high, and the specifications of the provided SOI substrates are relatively simple, so it is impossible to adjust the thickness of each layer according to the needs of the device.

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