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A semiconductor memory device, its manufacturing method, and electronic device

A technology for memory devices and electronic devices, applied in semiconductor devices, electric solid state devices, circuits, etc., can solve the problems of poor void filling effect, affecting device performance and yield, etc.

Active Publication Date: 2019-01-22
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Although the above-mentioned method has a good effect in devices with a large size, with the continuous reduction of the device size, many difficulties arise in the preparation of semiconductor devices using the method, and the gap filling effect becomes poor, which directly affects the performance and yield of the device. Therefore need further improvement to presently described method, so that eliminate above-mentioned problem

Method used

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  • A semiconductor memory device, its manufacturing method, and electronic device
  • A semiconductor memory device, its manufacturing method, and electronic device
  • A semiconductor memory device, its manufacturing method, and electronic device

Examples

Experimental program
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Embodiment 1

[0045] Attached below Figures 1a-1d A specific embodiment of the present invention will be described.

[0046] First, step 101 is performed to provide a semiconductor substrate 101 on which a floating gate material layer 102 , an isolation layer 103 and a control gate material layer 104 are formed.

[0047] First, refer to Figure 1a , wherein the semiconductor substrate 101 can be at least one of the materials mentioned below: silicon, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI) , silicon germanium on insulator (SiGeOI) and germanium on insulator (GeOI), etc.

[0048] In addition, an active region may be defined on the semiconductor substrate 101 . Other active devices may also be included on the active area, which are not marked in the shown figures for convenience.

[0049] Optionally, a gate dielectric layer may also be formed on the semiconductor substrate 101 , wherein the gate dielectric layer may be a dielectri...

Embodiment 2

[0087] The present invention also provides a semiconductor storage device, which is prepared by the method described in Embodiment 1. The control gate of the semiconductor storage device prepared by the method has a tapered structure, and an inverted tapered opening with a wide top and a narrow bottom is formed between the control gates, and a better filling effect can be obtained when filling the opening with material , so that the prepared devices have better performance and yield.

Embodiment 3

[0089] The present invention also provides an electronic device, including the semiconductor storage device described in Embodiment 2. Wherein, the semiconductor storage device is the semiconductor storage device described in Embodiment 2, or the semiconductor storage device obtained according to the preparation method described in Embodiment 1.

[0090] The electronic device of this embodiment can be any electronic product or equipment such as mobile phone, tablet computer, notebook computer, netbook, game console, TV set, VCD, DVD, navigator, camera, video recorder, voice recorder, MP3, MP4, PSP, etc. , can also be any intermediate product including the semiconductor device. The electronic device according to the embodiment of the present invention has better performance due to the use of the above-mentioned semiconductor device.

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Abstract

The invention relates to a semiconductor memory device and a preparation method thereof, and an electronic device. The method includes: step S1: providing a semiconductor substrate, on which a floating gate material layer, an isolation layer, and a control gate material layer are formed. and a hard mask layer, wherein the hard mask layer has different wet etching rates in the vertical direction; Step S2: Pattern the hard mask layer to form an opening to expose the control gate material layer ; Step S3: Wet etching the hard mask layer to expand the opening to form an inverse tapered opening with a wide top and narrow bottom; Step S4: Use the hard mask layer as a mask to etch the control gate material layer, the isolation layer and the floating gate material layer to form a tapered floating gate and a control gate that are narrow at the top and wide at the bottom. The method of the present invention can form a tapered floating gate and a control gate in a smaller device, and the gap between the tapered floating gate and the control gate is easier to fill.

Description

technical field [0001] The present invention relates to a semiconductor memory device, in particular, the present invention relates to a semiconductor memory device, a manufacturing method thereof, and an electronic device. Background technique [0002] With the rapid development of portable electronic devices (such as mobile phones, digital cameras, MP3 players, and PDAs, etc.), the requirements for data storage are getting higher and higher. Non-volatile flash memory has become the most important storage component in these devices due to its ability to save data even when power is off. Among them, because flash memory (flash memory) can achieve high chip storage density, and does not introduce new materials , The manufacturing process is compatible, therefore, it can be more easily and reliably integrated into own digital and analog circuits. [0003] NOR and NAND are two main non-volatile flash memory technologies on the market today. NOR flash memory (Flash) devices are...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11524H10B41/35H10B69/00
Inventor 王彦张翼英
Owner SEMICON MFG INT (SHANGHAI) CORP