Fabrication method for improving current expansion of vertical light-emitting diode (LED)

Abstract

The invention provides a fabrication method for improving current expansion of a vertical light-emitting diode (LED). The fabrication method comprises the following steps of firstly, providing an LED chip for exposing an N-type GaN layer after a substrate is stripped and grown, and forming a passivation layer on the surface of the N-type GaN layer; secondly, etching the passivation layer, exposing the surface of the N-type GaN layer, and forming metal electrode opening holes and bonding pad opening holes; and finally, evaporating a metal material in the metal electrode opening holes to form a metal electrode, and simultaneously evaporating the metal materials in the bonding pad opening holes and on the passivation layer between the bonding pad opening holes to form bonding pads, wherein the width of the metal electrode is gradually changed, and the width of the bonding pad opening holes is larger than or equal to the width of the bonding pads evaporated in the bonding pad opening holes. The bonding pad opening holes are completely or partially filled with the metal materials, so that the bonding pads are prevented from being in direct contact with the N-type GaN layer, direct combination under the bonding pads is prevented, and the luminous efficiency of the chip is improved; and meanwhile, with the adoption of a mode that the width of the metal electrode is gradually changed, current is easily expanded to a more edge region, and the current expansion of the chip is improved.

Description

technical field [0001] The invention relates to the technical field of LED manufacturing, in particular to a manufacturing method for improving current expansion of a vertical LED chip. Background technique [0002] With the needs of production and life, the application direction of high-power light-emitting diodes (Light-Emitting Diode, LED) is becoming more and more extensive, and the research corresponding to it is also getting more and more in-depth. However, traditional LEDs have disadvantages such as current congestion and high voltage under high current, which makes vertical LED chips have obvious advantages in high-power chip applications. The basic structure of the vertical structure LED chip is as follows: the epitaxial layer is bonded on the conductive support substrate through the reflective / bonding layer, the growth substrate is peeled off, and the side wall protection layer and electrodes are evaporated to form a vertical structure semiconductor chip. As far a...

AI Technical Summary

Problems solved by technology

As far as the current vertical chip is concerned, there is still current crowding in the metal electrode area, which reduces the life of the chip on the one hand and reduces the luminous efficiency of the chip on the other hand.

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