Relay protection action logic simulation realization method

A technology of action logic and relay protection, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve problems such as system hazards, failure to analyze potential problems of internal working conditions, and cumbersome analysis work to ensure integrity , Strong maintainability and portability, and the effect of improving processing efficiency

Inactive Publication Date: 2016-07-27
INTEGRATED ELECTRONICS SYST LAB
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  • Summary
  • Abstract
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  • Application Information

AI Technical Summary

Problems solved by technology

If the protection action of the relay protection device is not activated correctly, it will cause serious harm to the system.
[0003] At present, the traditional power system fault analysis method

Method used

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  • Relay protection action logic simulation realization method
  • Relay protection action logic simulation realization method
  • Relay protection action logic simulation realization method

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Embodiment Construction

[0041] In order to clearly illustrate the technical solution of the present invention, the present invention will be described below through a specific embodiment in conjunction with the accompanying drawings.

[0042] Such as figure 1 As shown, a method for implementing relay protection action logic simulation includes the following steps:

[0043] Step 1. Prepare the logic graph model description configuration file and intermediate node files

[0044] According to the logic diagram of the manual of the relay protection device, manually create the logic diagram model description configuration file; when the power system fails, the relay protection device protection starts to remove the faulty component, and at the same time, the relay protection device generates intermediate node information and automatically saves it as an intermediate node file, download the intermediate node file to the local disk through a third-party or FTP tool;

[0045] Step 2. Draw the initial stat...

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Abstract

The invention discloses a relay protection action logic simulation realization method. The method comprises the steps of preparing a logic graph model description configuration file and an intermediate node file; drawing an initial state logic graph and configuring related graphic element attributes; loading and analyzing the logic graph model description configuration file and the intermediate node file; loading and displaying the logic graph; and performing simulated demonstration on the logic graph. The method inherits object-oriented and modular design concepts, and has the advantages of high cohesion, low coupling, high maintainability and portability, and the like. Relay protection action logic simulation system software is developed based on the method described by the invention; and the simulation system software can simulate a protection action operation state of any fault type and fault point, and has the advantages of accuracy, intuitiveness, flexibility in use, high efficiency and the like.

Description

technical field [0001] The invention relates to the technical field of intelligent substation automation, in particular to a method for realizing relay protection action logic simulation. Background technique [0002] As an important part of the power system, the relay protection device can quickly remove the faulty equipment when the power system fails to ensure the safe operation of the power system. If the protection action of the relay protection device is not started correctly, it will cause serious harm to the system. [0003] At present, the traditional power system fault analysis method is to print the action report and action record of the protection device, and view the record wave through the fault recorder for analysis. Analyze its internal workings and potential problems. Contents of the invention [0004] In view of the above-mentioned problems, the present invention provides a method for implementing logical simulation of relay protection actions that is c...

Claims

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Application Information

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IPC IPC(8): G06F17/50G06Q50/06
CPCG06F30/367G06Q50/06
Inventor 田君茹苏怀广张凯王菲菲魏欣王林先董岱岳
Owner INTEGRATED ELECTRONICS SYST LAB
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