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Manufacturing method and structure of trench gate power device

A technology of power devices and manufacturing methods, which is applied in the manufacture of trench gate power devices and the field of trench gate power devices, can solve the problems of reducing on-resistance, etc., and achieve the goals of reducing on-resistance, saving manufacturing costs, and reducing unit size Effect

Active Publication Date: 2018-10-26
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This limits the possibility of reducing the on-resistance by reducing the size of the platform between the trenches. The size of the platform between the trenches is also the distance between the trenches, that is, the width of the epitaxial layer between the trenches.

Method used

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  • Manufacturing method and structure of trench gate power device
  • Manufacturing method and structure of trench gate power device
  • Manufacturing method and structure of trench gate power device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0067] Such as figure 2 Shown is a flowchart of a method for manufacturing a trench gate power device according to an embodiment of the present invention; Figure 3A to Figure 3O Shown is a device structure diagram of each step of the manufacturing method of the trench gate power device according to the embodiment of the present invention. The conduction region of the trench gate power device in the manufacturing method of the trench gate power device according to the embodiment of the present invention is composed of a plurality of cells periodically arranged, and the forming steps of each cell in the conduction region of the trench gate power device include:

[0068] Step 1, such as Figure 3A As shown, a hard mask layer 201 is formed on the surface of a semiconductor substrate 1 of the first conductivity type; preferably, the semiconductor substrate 1 is a silicon substrate and a semiconductor epitaxial layer 2 of the first conductivity type is formed on the surface . T...

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Abstract

The invention discloses a manufacturing method for a groove grid power device. Formation steps of each cell of a conduction region comprise that a hard mask layer is formed, and a groove is formed through photolithographic etching; a grid medium layer and a polysilicon grid are formed in the groove; an opening of the hard mask layer is enlarged through isotropic etching, and a self-aligning column is formed; a body region is formed; a source region is formed; deposition of an interlayer film is carried out; chemical mechanical grinding planarization for the interlayer film is carried out to the surface of the top portion of the self-aligning column; an opening of a contact hole at the top portion of the source region formed at the self-aligning column is removed; and metal is filled into the contact hole. The invention further discloses a groove grid power device. According to the manufacturing method, self-aligning definition of the contact hole can be realized, registration redundancy is not needed to consider, the contact hole does not require the exposure technology, manufacturing cost is saved, so threshold voltage stability of the device can be improved, unit dimensions of the device are reduced, and conduction resistance is reduced.

Description

technical field [0001] The invention relates to a manufacturing process method of a semiconductor integrated circuit, in particular to a manufacturing method of a trench gate power device. The invention also relates to a trench gate power device. Background technique [0002] In the existing manufacturing method of trench gate power devices, the conduction region of the device is composed of a plurality of cells, that is, unit structures (cells), such as forming a parallel structure. A contact hole needs to be cut through the source region to connect the body region at the bottom of the source region. In the actual process, the registration redundancy of the contact hole and the trench should be considered, and the gap between the contact hole and the trench should be large enough to prevent the threshold voltage drift caused by the offset of the contact hole exposure. This limits the possibility of reducing the on-resistance by reducing the size of the mesa between the tr...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L21/033H01L21/266H01L29/739
CPCH01L21/033H01L21/266H01L29/66704H01L29/739
Inventor 柯行飞缪进征
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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