Low-dropout linear voltage stabilizing circuit with low power consumption

Abstract

The invention relates to the field of electronic technology and particularly relates to a low-dropout linear voltage stabilizing circuit with low power consumption. The circuit consists of a core circuit, a frequency compensation circuit and a feedback circuit, wherein the core circuit consists of an operational amplifier AMP, a first P-type field effect transistor PM1, a first resistor R1 and a second resistor R2; the frequency compensation circuit consists of a fourth P-type field effect transistor PM4, a third resistor R3 and a first capacitor C1; and the feedback circuit consists of a second P-type field effect transistor PM2, a third P-type field effect transistor PM3, a first N-type field effect transistor NM1, a second N-type field effect transistor NM2 and a third N-type field effect transistor NM3. With a simple structure, the circuit provided by the invention realizes fast transient response and guarantees the circuit stability when the load current changes in a relatively large range.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to a low-power-consumption low-dropout linear regulator circuit. Background technique [0002] In VLSI or SOC (system on chip), LDO (Low Dropout Voltage Regulator: low dropout linear regulator) is generally used to provide a regulated power supply for the chip. The LDO can use off-chip filter capacitors or non-capacitive LDOs. LDOs using off-chip filter capacitors will increase the pins of the chip and increase the application cost of the chip. The non-capacitor-type LDO has less large capacitors connected in parallel at the output end in the circuit structure, so it also lacks an important charge storage. Devices and compensation capacitors, when the load current is large, the fluctuation of the load current will cause the change of the output voltage, so the transient response capability and stability of the LDO become the difficulty in the design. Contents of the inventio...

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Problems solved by technology

[0002] In VLSI or SOC (system on chip), LDO (Low Dropout Voltage Regulator: low dropout linear regulator) is generally used to provide a regulated power supply for the chip. The LDO can use off-chip filter capacitors or non-capacitive LDOs. LDOs using off-chip filter capacitors will increase the pins of the chip and increase the application cost of the chip. The non-capacitor-type LDO has less large capacitors connected in parallel at the output end in the circuit structure, so it also lacks an important charge storage. Devices and compensation capacitors, when the load current is large, the fluctuation of the load current will cause the change of the output voltage, so the transient response capability and stability of the LDO become the difficulty in the design

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