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Semiconductor preparation method

A semiconductor and dielectric layer technology, applied in the field of semiconductor preparation, can solve problems such as poor wafer edge etching, film drop, and semiconductor device defects, and achieve the effect of being beneficial to protection, avoiding defects, and improving reliability.

Active Publication Date: 2019-03-12
WUHAN XINXIN SEMICON MFG CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

For example, when using CVD to deposit a hard mask film (such as a high light-absorbing film-Kodiak film), the hard mask film is basically not deposited at the edge of the wafer, resulting in insufficient blocking of the subsequent hard mask film, resulting in the etching of the edge of the wafer For example, during dry etching, due to the uneven thickness of the wafer film, the film at the edge will easily fall off, resulting in over-etching or insufficient etching on the edge of the wafer. , so that the subsequent silicon epitaxial growth cannot be realized, and the protective layer for the structure cannot be formed, which will eventually lead to adverse effects on semiconductor devices.

Method used

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preparation example Construction

[0039] The core idea of ​​the present invention is that the present invention provides a semiconductor preparation method, the semiconductor preparation method comprising:

[0040] Step S1: providing a substrate;

[0041] Step S2: depositing a dielectric layer on the upper surface of the substrate;

[0042] Step S3: forming a first protective layer on the dielectric layer at the edge of the substrate, the first protective layer has a first width from the edge of the substrate to the center of the substrate;

[0043] Step S4: forming a contact hole structure in the dielectric layer not covered by the first protective layer;

[0044] Step S5: forming a second protective layer on the dielectric layer at the edge of the substrate, the second protective layer has a second width from the edge of the substrate to the center of the substrate, and the second width is larger than the first width;

[0045] Step S6: forming grid grooves in the dielectric layer not covered by the second...

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Abstract

The invention discloses a semiconductor preparation method. The semiconductor preparation method provides a substrate; deposits a dielectric layer on the upper surface of the substrate; forms a first protection layer on the dielectric layer at the edge of the substrate, and the first protection layer is on the substrate The direction from the edge of the edge to the center of the substrate has a first width; a contact hole structure is formed in the dielectric layer not covered by the first protective layer; a second protective layer is formed on the dielectric layer at the edge of the substrate, and the second protective layer is formed on the dielectric layer of the substrate The direction from the edge to the center of the base has a second width, and the second width is greater than the first width; a gate bar groove is formed in the dielectric layer not covered by the second protection layer. The present invention leaves a certain protective layer on the dielectric layer at the edge of the substrate, so that the dielectric layer at the edge of the substrate is protected, preventing defective structures from being formed on the dielectric layer at the edge of the substrate; and, the second width If the width is greater than the first width, the generation of defects can be further avoided and the reliability of the device can be improved.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a semiconductor preparation method. Background technique [0002] During the development of three-dimensional flash memory technology in the semiconductor field, with the increase of film thickness (greater than 3um), due to the limitation of manufacturing equipment, in the vapor deposition (CVD) and dry etching of the manufacturing process, the edge of the wafer problems became more prominent. For example, when using CVD to deposit a hard mask film (such as a high light-absorbing film-Kodiak film), the hard mask film is basically not deposited at the edge of the wafer, resulting in insufficient blocking of the subsequent hard mask film, resulting in the etching of the edge of the wafer For example, during dry etching, due to the uneven thickness of the wafer film, the film at the edge will easily fall off, resulting in over-etching or insufficient etching on the edge of the wafer....

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L27/115H10B69/00
CPCH01L21/76802H01L21/76814H10B69/00
Inventor 高晶霍宗亮徐强
Owner WUHAN XINXIN SEMICON MFG CO LTD
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