Processor architecture for directly executing encrypted instruction based on fixed decryption algorithm
A technology of processor architecture and decryption algorithm, applied in machine execution devices, electrical digital data processing, instruments, etc., can solve problems such as the security of execution instructions not involving the processor, and achieve execution security, program realization, and communication security. Effect
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[0018] Such as Figure 2 to Figure 3 As shown, this specific implementation adopts the following technical solutions: it includes a read instruction module 1, an instruction decryption module 2, an instruction decoding module 3, and an execution instruction module 4; the read instruction module 1 is connected to the instruction decryption module 2. The instruction decryption module 2 is connected to the instruction decoding module 3; the instruction decoding module 3 is connected to the execution instruction module 4; the instruction decryption module 2 includes a decryption module group 21, a decryption password 22, and a password instruction 23. Module selection code 24 and clear code instruction 25; the decryption password 22, password instruction 23, and module selection code 24 are respectively connected to the decryption module group 21; the decryption module group 21 is connected to the clear code instruction 25.
[0019] The decryption module group 21 may include multiple...
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