Integrated circuit and self-protection output buffer

Abstract

Disclosed are an integrated circuit and a self-protection output buffer thereof. The integrated circuit comprises a plurality of output buffers that are connected between a plurality of output pads and an inner integrated circuit unit. Each output buffer comprises a standard MOS element area and an electrostatic protection enhanced MOS element area. The standard MOS element area comprises a plurality of first MOS elements, and the grid electrode areas of the first MOS elements are commonly connected to the inner integrated circuit. The electrostatic protection enhanced MOS element area comprises a plurality of second MOS elements, and the grid electrode areas of the second MOS elements are commonly connected to the inner integrated circuit. The interval between one side of a contact layer of the drain electrode area of each second MOS element and a long side of the nearest polycrystalline silicon area is greater than the interval between one side of a contact layer of the drain electrode area of each first MOS element and a long side of the nearest polycrystalline silicon area. The lower part of the dopant area of the drain area of each second MOS element is provided with a dopant area having different polarity, so that trigger voltage of a gold oxygen hemi-element is reduced, and conduction is accelerated to quickly eliminate static electricity.

Description

technical field [0001] The invention relates to an output buffer of an integrated circuit, in particular to a layout structure of an output buffer with self-static protection. Background technique [0002] Generally speaking, the metal-oxide-semiconductor (MOS) element of an integrated circuit (IC) using a metal-oxide-semiconductor (MOS) process is easily damaged by electrostatic high-voltage discharge . Such as Figure 9 As shown, an internal integrated circuit unit 51 of the integrated circuit 50 is connected to a plurality of output pads 52 (output pads) through a plurality of output buffers 511 (output buffer), and each of the output buffers is composed of MOS elements, That is, it includes PMOS elements (PMOS1~PMOSn) and NMOS elements (NMOS1~NMOSn) (such as Figure 10 shown). Since the output buffer 511 is used to connect to the output pad 52, when static electricity discharges high voltage to the output pad 52, its MOS element is most likely to be damaged by the hig...

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a layout structure of an integrated circuit and its output buffer with self-static protection, so as to solve the problem that the output buffer of the general integrated circuit in the prior art takes up too much space due to the addition of an electrostatic protection circuit as an electrostatic protection means. Technical defects in circuit layout area

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