Unlock instant, AI-driven research and patent intelligence for your innovation.

A Method of Realizing Fuse Trimming by Using Iterative Method

A technology of fuse trimming and iterative method, applied in the field of integrated circuits, can solve problems such as low wafer yield and achieve the effect of improving test yield

Active Publication Date: 2019-01-29
WUXI ZHONGWEI TENGXIN ELECTRONICS
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In order to overcome the problem of low wafer yield due to inaccurate fuse trimming, the present invention provides a method of applying an iterative method to fuse trimming, which improves product accuracy through wafer testing

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A Method of Realizing Fuse Trimming by Using Iterative Method
  • A Method of Realizing Fuse Trimming by Using Iterative Method
  • A Method of Realizing Fuse Trimming by Using Iterative Method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0017] The present invention will be further described below in conjunction with specific drawings and embodiments.

[0018] In the test of analog chips, it is necessary to make the benchmark value of the factory circuit more accurate and more consistent through fuse trimming. In this embodiment, the iterative method is used in the wafer test to realize fuse trimming, such as image 3 shown, including the following steps:

[0019] Step 1. In this example, the target value after fuse trimming is 18.75mV. Create a fuse truth table, as shown in the following table;

[0020]

[0021] The number of fuses is three sections, namely T1-GND, T2-GND, T3-GND. The theoretical values ​​of the reference voltage changes caused by the blown fuses of these three sections are respectively +37.5mV (T1-GND), +75mV (T2 -GND), +150mV (T3-GND), proportional relationship.

[0022] The fuse truth table has the lowest reference value of the reference voltage -262.5mV and the highest reference va...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a fuse trimming realization method through an iteration method. The fuse trimming realization method comprises the following steps: 1) setting a target value of each reference voltage after fuse trimming; 2) carrying out test on a chip and monitoring an actual measurement value of the reference voltage before chip fuse burning; 3) calculating die fuse burning step number according to the actual measurement value of the reference voltage obtained before chip fuse burning and the target value of the reference voltage, and burning the corresponding fuse according to correspondence relationship of a fuse truth table; 4) measuring reference voltage after fuse burning, and judging whether a reference value test item is qualified; and 5) calculating current fuse burning step pitch according to the actual measurement values of the reference voltage before and after fuse burning, and applying the step pitch to the fuse burning calculation of the next die. The advantages are that the iteration method is used for fuse trimming, and the fuse truth table can be adjusted automatically to enable the table to be more suitable for the current wafer area, and the reference value obtained after trimming is closer to the target value, thereby improving test qualified rate.

Description

technical field [0001] The invention relates to a method for realizing fuse trimming through an iterative method in the wafer test process, and belongs to the technical field of integrated circuits. Background technique [0002] With the development of integrated circuit design and process technology, the circuit performance requirements are higher. However, the circuit performance is always affected by the non-ideal factors of the semiconductor manufacturing process, so that there are varying degrees of deviation between chips, wafers, and batches, and cannot be passed Simulation software for effective simulation and prediction. Thus, fuse trimming is often required during wafer testing to bring the dies to the same standard. [0003] Such as figure 1 As shown, common metal fuses are generally composed of metal resistors or film and other resistors, and the fuses are usually wide at both ends and narrow at the middle. Use the probe to add a large current (generally abou...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/66
CPCG01R31/2851G01R31/2894
Inventor 唐彩彬
Owner WUXI ZHONGWEI TENGXIN ELECTRONICS