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A Compensation Circuit for Capacitorless LDO

A compensation circuit, non-capacitor technology, applied in the direction of adjusting electrical variables, instruments, control/regulating systems, etc., can solve problems such as system stability changes, and achieve the effects of enhanced transient characteristics, improved stability, and improved stability.

Active Publication Date: 2019-01-18
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Therefore, since the load change of the above circuit will also affect the change of the main pole, the stability of the system will change accordingly

Method used

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  • A Compensation Circuit for Capacitorless LDO
  • A Compensation Circuit for Capacitorless LDO
  • A Compensation Circuit for Capacitorless LDO

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0034] see Figure 5 and Figure 6 , Figure 5 Shown is a schematic structural diagram of the circuit structure of the operational amplifier AMP used in the embodiment of the non-capacitive LDO compensation circuit (adding Miller compensation in the operational amplifier) ​​of the present invention; Figure 6 Shown is a schematic diagram of the pole distribution of the op amp after adding Miller compensation.

[0035] Please combine image 3 refer to Figure 5 , a compensation circuit for a capacitorless LDO, comprising an input terminal, an output terminal, an operational amplifier AMP, a load regulator tube PM1 connected in series, a first load divider resistor R1 and a second load divider resistor R2; wherein , the source of the load regulator PM1 is connected to the power supply VDD, the second load dividing resistor R2 is grounded, the negative pole of the operational amplifier AMP is connected to the input terminal, and the positive pole of the operational amplifier ...

Embodiment 2

[0039] see Figure 7 and Figure 8 , Figure 7 Shown is a schematic diagram of a compensation circuit for a capacitorless LDO (including a compensation resistor R0 and a first compensation capacitor C1 connected in series) in an embodiment of the present invention; Figure 8 Shown is a schematic diagram of the pole distribution after compensation by adding the compensation resistor R0 and the first compensation capacitor C1.

[0040] Figure 7 Shown is a schematic structural diagram of the non-capacitance LDO compensation circuit in the embodiment of the present invention; A compensation resistor R0 and a first compensation capacitor C1 are connected in series. The input terminal of the compensation resistor R0 is connected to the VP terminal of the operational amplifier AMP, and the output terminal of the first compensation capacitor C1 is connected to the output terminal of the compensation circuit for the capacitorless LDO, wherein the VP point is located at the first o...

Embodiment 3

[0043] see Figure 9 and Figure 10 , Figure 9 Shown is a schematic diagram of the non-capacitance LDO compensation circuit (also including the second compensation capacitor C2) in the embodiment of the present invention; Figure 10 shown as Figure 9 Schematic diagram of the pole distribution after circuit compensation.

[0044] This embodiment continues to add compensation on the basis of the second embodiment. In order to solve the problem of gain warping, Figure 9 The circuit shown also includes a second compensation capacitor C2, the input terminal of the second compensation capacitor C2 is connected to the output terminal of the compensation circuit for the capacitorless LDO.

[0045] That is to say, Figure 9 A zero point is added to the output pole position of the compensation circuit in , so that the tail gain is guaranteed to be below 0dB, so that a good PM value is obtained, which meets the requirements of system stability (such as Figure 10 shown).

[004...

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PUM

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Abstract

A compensating circuit for a capacitor-less LDO comprises an input end, an output end, an operational amplifier AMP, and a load adjusting pipe PM1, a first load divider resistor R1 and a second load divider resistor R2 which are connected with one another in series. The operational amplifier AMP comprises a first operational amplifying unit, a second operational amplifying unit, and a Miller compensating unit formed by connecting a resistor R3 with a capacitor C0 in series, wherein the input end of the resistor R3 is connected with the output end of the first operational amplifying unit, and the output end of the capacitor C0 is electrically connected with the output end of the second operational amplifying unit. When the first operational amplifying unit inputs standard voltages, the operational amplifier AMP works, and stable voltage output VOUT is obtained through the effect of the load adjusting pipe PM1, the first load divider resistor R1 and the second load divider resistor R2.

Description

technical field [0001] The invention relates to the field of CMOS integrated circuit design, in particular to a circuit capable of effectively compensating a non-capacitor type LDO (low drop out). Background technique [0002] LDO (low dropout regulator) refers to a low-dropout linear regulator. Compared with traditional linear regulators, it usually has extremely low self-noise and high power supply rejection ratio PSRR (Power Supply Rejection Ratio) . [0003] LDO is a new generation of integrated circuit voltage regulator. The biggest difference between it and the three-terminal voltage regulator is that LDO is a miniature system-on-chip with very low self-consumption. The structure of the LDO low-dropout linear regulator mainly includes a startup circuit, a constant current source bias unit, an enable circuit, an adjustment element, a reference source, an error amplifier, a feedback resistor network, and a protection circuit. [0004] The basic working principle of LDO...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05F1/56
CPCG05F1/561
Inventor 马腾飞张宁钱翼飞
Owner SHANGHAI HUALI MICROELECTRONICS CORP