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Access address continuity-based cache module and access method thereof

A memory access address and continuity technology, which is applied to the cache module and its memory access field based on the continuity of memory access addresses, can solve problems such as restricting computer performance, reduce circuit costs, speed up memory access speed, and reduce cache size Effect

Active Publication Date: 2017-04-19
AMICRO SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The storage wall is a major challenge in the process of computer development, which restricts the improvement of computer performance

Method used

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  • Access address continuity-based cache module and access method thereof
  • Access address continuity-based cache module and access method thereof
  • Access address continuity-based cache module and access method thereof

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Embodiment Construction

[0034] In order to make the technical solutions and beneficial effects described in this application clearer, the following will be described in detail in conjunction with the accompanying drawings and specific embodiments:

[0035] Such as figure 1 As shown, a SOC bus system includes CPU, DMA, system bus, flash memory and cache module. The cache module is set on the path from the CPU to the flash memory. The cache module includes a Dcache, a Ccache, address judgment and data return unit and interface conversion unit. Dcache is used to cache discontinuous access data, and Ccache is used to cache continuous data cache. The continuity in Ccache is only a specific recognizable sequence, such as address increment, decrement, shift, etc.

[0036] Assume that in the above circuit, the access time of flash memory is 3 clock cycles, and cannot be pipelined. Such as figure 2 As shown, the number of starting items in each cache line of Ccache is 3, and the number of prefetching item...

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Abstract

The invention discloses an access address continuity-based cache module and an access method thereof. The cache module comprises a plurality of caches defined by taking continuity as a principle, an address judgment and data return unit, and an interface conversion unit, wherein the caches include a Dcache which caches non-continuous access data and a Ccache which caches continuous access data; the address judgment and data return unit executes operations of monitoring an access behavior, judging address continuity and outputting a result to the Dcache and the Ccache, and executes data return operation; and the interface conversion unit executes operations of conversion from a system bus to a flash memory interface, and prefetching command transmission and cancellation of the caches. According to the cache module and the access method, data needed by a CPU is put in the caches in advance mainly through an access continuity law, so that the access speed is increased and the SOC performance is improved.

Description

[0001] 【Technical field】 [0002] The invention relates to the technical field of integrated circuit system-on-chip (SOC) architecture design, in particular to a cache module and a memory access method based on the continuity of memory access addresses. [0003] 【Background technique】 [0004] The storage wall is a major challenge in the process of computer development, which restricts the improvement of computer performance. Memory access speed is an important index to evaluate computer performance in SOC system. [0005] In order to deal with the storage wall problem, the industry has developed a series of technologies, such as using a hierarchical storage system, and adopting technologies such as prefetching, inference, instruction scheduling, and thread scheduling. The goal of these technologies is: to take advantage of the speed of the cache, the CPU directly reads and writes the data in the cache, and avoids accessing low-speed and low-level memory to the greatest extent...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/0882G06F12/10
CPCG06F12/0802G06F12/1045Y02D10/00
Inventor 李璋辉许登科
Owner AMICRO SEMICON CORP