Avoidance method for conflict between instruction sets in RISC-CPU and avoidance system thereof

A RISC-CPU and instruction set technology, applied in the direction of concurrent instruction execution, program control design, instruments, etc., can solve the problems that there is no CPU hardware design engineering strategy, and there is no instruction system to provide RAW coherent conflict resolution methods, etc., to achieve The effect of smooth pipeline

Active Publication Date: 2017-05-03
SHANDONG NORMAL UNIV
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  • Abstract
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Problems solved by technology

[0007] It can be seen that none of the prior art provides a method for RAW coherent conflict resolution from the perspective of the overall instruction s...

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  • Avoidance method for conflict between instruction sets in RISC-CPU and avoidance system thereof
  • Avoidance method for conflict between instruction sets in RISC-CPU and avoidance system thereof
  • Avoidance method for conflict between instruction sets in RISC-CPU and avoidance system thereof

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Embodiment Construction

[0045] The present invention is described in detail below in conjunction with accompanying drawing:

[0046] Such as figure 1 As shown, the present invention proposes an effective method for resolving CPU instruction conflicts. The present invention divides all instructions in the design into 4 categories (data processing instructions, branch Branch instructions, immediate data instructions, and storage access instructions), extracts representative instruction subsets from each type of instruction, and solves the internal problems of the instruction subsets respectively. Conflicts with RAW (write-after-read) direct data coherence between them. Pre-statistically analyze all potential RAW conflicts, and then locate and resolve conflicts to achieve a smooth pipeline.

[0047] The RISC-CPU design proposed by the present invention divides all instruction sets into data processing (Data-Processing), memory access (STORE / LOAD), branch (Branch), and immediate data (Immediate) four i...

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Abstract

The invention discloses an avoidance method for the conflict between instruction sets in RISC-CPU and an avoidance system thereof. The avoidance method comprises the following steps that step one: the conflict type is determined according to the data dependence relationship between different instruction sets in the RISC-CPU; step two: accessing to a "register file" or "memory" is judged by aiming at the current instruction, the step three is performed if the judgment result is yes, or analysis of the next instruction is continued; step three: a "coherent window" is defined by aiming at the current instruction, a "coherent instruction" is searched in the "coherent window" and existence of the "coherent instruction" is judged, the process enters the step four if the judgment result is yes, or the judgment result indicates no read-write conflict; and step four: the conflict method is selected according to the conflict type between different instruction sets, the data conflict is solved by using a concrete strategy and the assembly line throughput efficiency can also be guaranteed.

Description

technical field [0001] The invention relates to the technical field of computer processing, in particular to a method and system for avoiding conflicts between instruction sets in a RISC-CPU. Background technique [0002] Because the design of embedded RISC-CPU (from CPU hardware instruction set selection and instruction custom design, to the design of corresponding compiler) is very important. [0003] The relevant technologies are as follows: the application number is CN200810191060, and the applicant is "Shiyifa (Beijing) Semiconductor Research and Development Co., Ltd." for the invention patent application "reducing instruction conflicts in processors". Instruction issue) stage, select two kinds of instructions, and send them to the subsequent parallel functional unit, to see which instruction has no conflict, and then arbitrate one of the instructions. This method is used to select a conflict-free command from a multi-issue command window. [0004] The invention paten...

Claims

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Application Information

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IPC IPC(8): G06F9/30G06F9/38
CPCG06F9/30134G06F9/30141G06F9/3814G06F9/3816G06F9/3869
Inventor 孙建辉王春兴王公堂李登旺
Owner SHANDONG NORMAL UNIV
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