A start-up circuit for ultra-low power reference

Abstract

The invention discloses a start-up circuit used for an ultra-low power consumption reference source. Compared with a start-up circuit in a traditional reference source module, a negative-threshold NMOS transistor is reasonably used, so the defect that a large transient current is generated just at the moment the start-up circuit works is ingeniously overcome, and the start-up circuit can be widely used in some reference source modules with stringent power consumption requirements.

Description

technical field [0001] The invention is used in the field of integrated circuit design, and in particular relates to a starting circuit for an ultra-low power consumption reference source. Background technique [0002] In recent years, with the widespread development and application of various portable electronic products, such as mobile phones, digital cameras, mobile audio / video equipment, etc., how to reduce power consumption and prolong battery life has become one of the primary considerations in product design. Especially for the USB interface chip, when it is not communicating, the chip is in a sleep state. In this state, the power consumption of the whole chip is only a few uA and the transient large current needs to be strictly controlled. As one of the important modules of the wake-up function of the USB interface chip, the reference voltage source has extremely strict requirements on power consumption. It is necessary to ensure ultra-low power consumption and canno...

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Problems solved by technology

As one of the important modules of the wake-up function of the USB interface chip, the reference voltage source has extremely strict requirements on power consumption. It is necessary to ensure ultra-low power consumption and cannot generate large transient currents. It is difficult to meet the requirements, because the start-up circuit is very easy to generate a large current to make the reference voltage source get rid of the "locked" state at the moment it is turned on. A very typical start-up circuit such as figure 1 As shown, when the bias current generating circuit is "locked", that is, the gate of the NMOS transistor N3 is at a low level, the gate of the PMOS transistor P3 is at a high level, and the PMOS transistor P1 is in an off state. At the same time, the NMOS transistor N1 is also In the off state, then, the gate of PMOS transistor P2 is low, P2 will be fully turned on, the gate of NMOS transistor N3 will receive a high level, and both NMOS transistors N3 and N4 will be fully turned on, although the bias current The generating circuit will get rid of the "locked" state, which will inevitably generate a large transient current on their respective ground paths, increasing power consumption

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