Chip debugging system and method and system chip

Abstract

The invention provides a chip debugging system capable of retaining debugging information. The chip debugging system comprises a debugging device and a system chip. The system chip comprises a debugging interface module, a reset module, a program recording and selection module and a processor, wherein the debugging interface module is connected to the debugging device so as to receive a control command, and a control signal and a reset signal can be generated according to the control command; the reset module is in coupled connection with the debugging interface module, responds to the received reset signal and then generates a system reset signal; the program recording and selection module is in coupled connection to the debugging interface module so as to receive the control signal and adjust a working state of the module according to the control signal; and the processor is in coupled connection to the reset module, responds to the received system reset signal and thus restarts the system, so an infinite cyclic program or a normal start program can be operated according to the working state of the program recording and selection module.

Description

technical field [0001] The present invention relates to a chip debugging system, method and system chip, and in particular to a chip debugging system, method and system chip capable of retaining debugging information. Background technique [0002] With the vigorous development of various electronic products, in the process of R&D and manufacturing of system chips in electronic products, developers must spend more time and manpower on the designed or manufactured system chips to carry out system chip development. Debugging and debugging. Therefore, it has been developed to establish a measurement circuit in the system chip, and replace the probe detection with a small number of test pins and a serial transmission method. At present, this kind of architecture has been established as an industry standard, and it is called JTAG (JointTest Action Group). At present, most SoCs provide JTAG boundary-scan test structure for testing, development and simulation. Generally speaking,...

AI Technical Summary

Problems solved by technology

In the current development process, if the processor in the SoC crashes, developers usually use the debugging tool to connect to the JTAG interface of the SoC to check the program error point, but the debugging tool may not be successful at this time. Phenomenon connected to the processor

Developers often need to reset the system chip so that the debugging tool can successfully connect to the processor again, but the debugging information in the processor that can be used for debugging will be cleared due to the reset of the processor, so that developers cannot get Knowing the error point of the program prolongs the development time

Furthermore, when the debugging information in the processor is cleared, it is difficult for developers to reproduce the same error for debugging because they do not know where the program went wrong.

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