Seven-level inverter and seven-level inverter topology
A topology, seven-level technology, applied in electrical components, AC power input to DC power output, output power conversion devices, etc. Optimism and other issues, to achieve the effect of small size, high engineering application value, and reducing the number of clamping diodes
Active Publication Date: 2019-06-07
普世通(北京)电气有限公司
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Problems solved by technology
However, the cascaded multi-level inverter needs to be equipped with an independent DC power supply, or a multi-winding phase-shifting transformer is used, resulting in a large device size, and the cost of the cascaded multi-level inverter is not optimistic.
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[0019] In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of one or more embodiments. It may be evident, however, that these embodiments may be practiced without these specific details.
[0020] Various embodiments according to the present invention will be described in detail below with reference to the accompanying drawings.
[0021] figure 1 It is a structural schematic diagram of the seven-level inverter topology and the seven-level inverter of the present invention, such as figure 1 As shown, the seven-level inverter topology is composed of DC / AC unit 1 and DC / DC unit 2, wherein:
[0022] The DC / AC unit 1 includes a first DC capacitor C1 and a second DC capacitor C2, 8 switch tubes T1-T8, 8 diodes D1-D8 connected in antiparallel to the switch tubes, and an intermediate capacitor C3, wherein,
[0023] The first DC capacitor C1 and the second DC capacitor C2 are connected in seri...
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The present invention provides a seven-level inverter and its topology, including a DC / AC unit and a DC / DC unit. The DC / AC unit includes: T1 and T2 connected in parallel with C1 after being connected in series, and the input terminal of T1 is the first DC Input terminal P0; T3 and T4 are connected in parallel with C2 after being connected in series, and the output terminal of T4 is the second DC input terminal N0; the input terminal of T5 is connected with the output terminal of T1 and the input terminal of T2, and the output terminal of T5 is connected with the input terminal of T7 to the first of C3 Terminal P1; T6 input terminal and T8 output terminal are connected to the second terminal N1 of C3, T6 output terminal is connected with T3 output terminal and T4 input terminal; T7 output terminal and T8 input terminal are connected with the first output terminal, T2 output terminal and The input terminal of T3 is connected with the second output terminal. The input terminals of the DC / DC unit are P0 and N0, and the output terminals are P1 and N1, which are used to supplement the power difference of C3 and maintain the voltage stability of C3. The invention has few switch tubes and few capacitors.
Description
technical field [0001] The present invention relates to the technical field of power electronic converters, and more specifically, to a seven-level inverter and a seven-level inverter topology. Background technique [0002] The rapid development of new energy power generation technology has put forward higher requirements for power electronics technology. As the core component of the power conversion part, the performance of the high-power inverter directly affects the quality of power output. Multilevel inverters have been favored by scholars because of their advantages such as large number of output levels, small output voltage harmonics, high output power, low switching frequency, low loss, and high efficiency. Existing multilevel inverters mainly include diode-clamped multilevel inverters, capacitive multilevel inverters and cascaded multilevel inverters. Among them, the diode-clamped multilevel inverter needs a large number of diodes in order to obtain a higher number ...
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IPC IPC(8): H02M7/487
CPCH02M7/487H02M1/007
Inventor 吴学智赵亚雪武文童亦斌张维戈姜久春
Owner 普世通(北京)电气有限公司