Instruction scheduling method and device based on data streams

A technology of instruction scheduling and data flow, applied in the direction of concurrent instruction execution, machine execution device, electrical digital data processing, etc., can solve problems such as load imbalance, reduce energy consumption, improve controllable distribution, and have broad application prospects. Effect

Active Publication Date: 2017-06-30
北京睿芯数据流科技有限公司
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Problems solved by technology

[0005] The present invention provides a data flow-based instruction scheduling method and device to solve the problem of unbalanced load in the instruction distribution stage in existing computers

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  • Instruction scheduling method and device based on data streams
  • Instruction scheduling method and device based on data streams
  • Instruction scheduling method and device based on data streams

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Embodiment Construction

[0028] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0029] The present invention provides a data flow-based instruction scheduling device, which is used for scheduling and distributing instructions in M ​​functional units in a data processor, such as figure 1 Shown is a schematic diagram of the logical structure of M functional units in the data processor, where the arrows indicate the communication relationship between data and instructions between each functional unit (PE), the device includes:

[0030] M ins...

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Abstract

The invention discloses an instruction scheduling method and device based on data streams. The device includes M instruction counting boards, M independent counting devices and a PE scheduling counting device, and a plurality of counting bits and a plurality of flag bits are arranged in each instruction counting board, wherein the counting bits and the flag bits are in one-to-one correspondence; each independent counting device is used for recording the total number of flag bits which are set as 1 in a current function unit, and according to the execution conditions of instructions in function units, the PE scheduling counting device schedules the instructions. According to the instruction scheduling method and device, structural features of the data streams are fully taken into account and used, under the principle of compatibility, by monitoring the execution conditions of various instructions in a processor in real time and scheduling the instructions according to the execution conditions of the various instructions, the load imbalance problem existing in an instruction distribution stage in current computers is solved, the dynamic regulation, control and distribution of the instructions are achieved, not only are the utilization rate of each function unit and the controllable distributivity of resources greatly improved, but also the energy consumption is greatly reduced, and the instruction scheduling method and device have very wide application prospects.

Description

technical field [0001] The invention relates to the field of instruction control in computers, in particular, to a method and device for instruction scheduling based on data flow. Background technique [0002] According to the development roadmap of high-performance computing, it is estimated that around 2020, high-performance computing will enter the E-level (exascale, exascale) era12, and E-level computing cannot be P-level (petascale, petascale) computing Simple expansion, and the biggest challenge in building an exascale computing system is power consumption. [0003] The traditional von Neumann structure, that is, the control flow structure processor needs to frequently access data, and at the same time requires a large amount of control logic to improve the efficiency of instruction execution. These logic components can only bring limited instruction parallelism, but occupy a large amount of These complex control logics restrict the performance-to-power ratio of the c...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/38
CPCG06F9/3851
Inventor 祁玉琼谭旭朱亚涛李文明王达张浩范东睿
Owner 北京睿芯数据流科技有限公司
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