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A Small-Signal Impedance Modeling Method of Generalized Second-Order Integral Phase-Locked Loop

A modeling method and second-order integration technology, applied in AC network circuits, electrical components, single-network parallel feeding arrangements, etc., can solve the problem of convolution, complex calculation, and inability to truly reflect the impedance characteristics of single-phase phase-locked loops And other issues

Active Publication Date: 2020-08-18
CHINA ELECTRIC POWER RES INST +2
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Recently, the small-signal impedance modeling technology of PLL has been studied at home and abroad. In the current small-signal impedance modeling method, a small interference signal is generally used at the AC side grid voltage, and then according to the specific parameters and topology of the PLL Deriving and calculating the small-signal impedance model of the PLL, and this method is currently only applied to the simplest 1 / 4 cycle delay single-phase phase-locked loop, and has not been applied to the more complex generalized second-order integral phase-locked loop
The main disadvantage of this method is that when establishing the impedance model of the PLL, it is necessary to apply the harmonic linearization method to separate the disturbance. A large number of Fourier transforms are required, and there is a problem of convolution, and the calculation is more complicated.
In addition, this method does not consider the influence of the single-phase phase-locked loop quadrature signal generation link on the PLL impedance during the PLL impedance modeling process, but simply assumes a signal lagging behind the grid voltage by 90° as the quadrature signal of the phase-locked loop signal, and cannot truly reflect the complete impedance characteristics of a single-phase phase-locked loop

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  • A Small-Signal Impedance Modeling Method of Generalized Second-Order Integral Phase-Locked Loop
  • A Small-Signal Impedance Modeling Method of Generalized Second-Order Integral Phase-Locked Loop
  • A Small-Signal Impedance Modeling Method of Generalized Second-Order Integral Phase-Locked Loop

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Embodiment Construction

[0082] In order to more specifically illustrate the modeling process of the generalized second-order integral phase-locked loop small-signal model provided by the present invention, it will be described below in conjunction with the accompanying drawings.

[0083] Such as figure 2 As shown, the small-signal impedance modeling flowchart of the generalized second-order integral phase-locked loop of the present invention, the modeling method of the present invention comprises the following steps:

[0084] Step I: Determine the relationship between the input grid voltage in the stationary coordinate system and the small output signal in the rotating coordinate system;

[0085] Step II: Establish the transfer function of the virtual axis output disturbance component and the phase angle disturbance component under the rotating coordinate system;

[0086] Step III: establish the transfer function of the grid voltage disturbance component and the phase angle disturbance component un...

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Abstract

The invention relates to a small signal impedance modeling method for a second-order generalized integrator-phase locked loop (SOGI-PLL). The modeling method comprises six steps: 1, a DC component mu<dq> (t) under a rotating coordinate system is calculated, power grid voltage different from a base wave frequency and a phase angle small interference signal are injected respectively under a rectangular coordinate system, and the relationship between input power grid voltage under a stationary coordinate system and an output small signal under the rotating coordinate system is analyzed; 2, a transfer function for an imaginary axis output disturbance component and a phase angle disturbance component under the rotating coordinate system is built; 3, a transfer function for a power grid voltage disturbance component and a phase angle disturbance component under the stationary coordinate system is built; 4, a transfer function for a reference current disturbance component and a phase angle disturbance component is built; 5, a transfer function for a reference current disturbance component and a power grid voltage disturbance component under the stationary coordinate system is built; and 6, a complete single-phase SOGI-PLL impedance model is built. The modeling method provided by the invention has the advantages of simple and convenient calculation, and accurate modeling.

Description

technical field [0001] The invention relates to the field of power electronics, in particular to a small-signal impedance modeling method of a generalized second-order integral phase-locked loop. Background technique [0002] Phase-locked loop technology is a phase-locked loop, which is a grid synchronization technology. Today, when new energy is widely connected to the grid, the key technology to ensure the safe and stable operation of new energy access to the grid is grid synchronization technology, and phase-locked loop technology It is widely used in business. [0003] At present, there are some power quality problems whether it is distributed power generation or large-scale power stations integrated into the grid. Impedance analysis method is an effective method to effectively solve harmonic interference and system voltage stability. The most critical and difficult technology of the impedance analysis method is the impedance modeling technology of the frequency convert...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H02J3/00H02J3/40
CPCH02J3/00H02J3/40H02J2203/20
Inventor 张冲刘纯李光辉何国庆汪海蛟赵伟然冯凯辉孙艳霞郝木凯孙文文李士林
Owner CHINA ELECTRIC POWER RES INST
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