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Small signal impedance modeling method for second-order generalized integrator-phase locked loop (SOGI-PLL)

ActiveCN106936125ASolving Difficult Impedance Modeling ProblemsClear separationSingle network parallel feeding arrangementsIntegratorReference current
The invention relates to a small signal impedance modeling method for a second-order generalized integrator-phase locked loop (SOGI-PLL). The modeling method comprises six steps: 1, a DC component mu<dq> (t) under a rotating coordinate system is calculated, power grid voltage different from a base wave frequency and a phase angle small interference signal are injected respectively under a rectangular coordinate system, and the relationship between input power grid voltage under a stationary coordinate system and an output small signal under the rotating coordinate system is analyzed; 2, a transfer function for an imaginary axis output disturbance component and a phase angle disturbance component under the rotating coordinate system is built; 3, a transfer function for a power grid voltage disturbance component and a phase angle disturbance component under the stationary coordinate system is built; 4, a transfer function for a reference current disturbance component and a phase angle disturbance component is built; 5, a transfer function for a reference current disturbance component and a power grid voltage disturbance component under the stationary coordinate system is built; and 6, a complete single-phase SOGI-PLL impedance model is built. The modeling method provided by the invention has the advantages of simple and convenient calculation, and accurate modeling.
Owner:CHINA ELECTRIC POWER RES INST +2
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