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Finite field multiplier based on irreducible trinomial

A multiplier and trinomial technology, applied in the direction of instruments, electrical digital data processing, digital data processing components, etc.

Inactive Publication Date: 2017-08-04
SHENZHEN POLYTECHNIC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The selection of specific irreducible polynomials, such as irreducible trinomials, is of great significance for computing finite field multiplications, and finite field multipliers that exist in the prior art rarely use specific irreducible polynomials

Method used

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  • Finite field multiplier based on irreducible trinomial
  • Finite field multiplier based on irreducible trinomial
  • Finite field multiplier based on irreducible trinomial

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Embodiment Construction

[0034] specific implementation plan

[0035] The present invention will be described in further detail below through specific embodiments in conjunction with the accompanying drawings, but the embodiments of the present invention are not limited thereto.

[0036] as attached figure 1 As shown, the finite-field multiplier based on the irreducible trinomial of the present invention includes a controller, an input port, an output port, an XOR logic gate array, an AND logic gate array, an irreducible trinomial matrix unit, and a square modulus operation A matrix unit, an AND operation matrix unit, an exclusive OR operation matrix unit, and a multiplication operation matrix unit, the controllers are respectively connected to input ports, output ports and other components.

[0037] Each component of the present invention is described in detail below respectively:

[0038] (1) Input port: as attached figure 1 As shown, the embodiment of the present invention has 4 input ports in t...

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Abstract

The invention provides a finite field multiplier based on an irreducible trinomial. The multiplier comprises a controller, an input port, an output port, an exclusive or logic gate array, an and logic gate array, an irreducible trinomial matrix, a power modular arithmetic matrix, an and operation matrix, an exclusive or operation matrix and a multiplication operation matrix; the input port comprises a port for inputting a multiplication operand a(x), a port for inputting a b(x), a port for inputting the size of GF(2n) where the multiplication is located, and a port for inputting a clock signal; the output port comprises a port for outputting a multiplication result c(x), and a port for outputting feedback information about whether operation is within the multiplier operation range or not; the controller comprises a processor and an analyzer which are connected and is connected with the other components; the irreducible trinomial matrix stores the irreducible trinomial on different GF(2n); the and operation matrix stores the and operation results among bits of the a(x) and bits of the b(x). Compared with an existing multiplier, the finite field multiplier has the obvious speed advantage on multiplication on GF(2n) calculation.

Description

technical field [0001] The invention relates to a device for multiplying elements of a finite field, in particular to an arithmetic unit for multiplying two operands of a finite field based on an irreducible trinomial. Background technique [0002] A finite field is a field containing only a finite number of elements, first discovered by Galois, so a finite field is also called a Galois field. Finite fields are widely used in mathematics and engineering. Finite field calculation is one of the important mathematical theories of finite fields, including finite field addition, multiplication, inversion, division, etc. Among them, finite field multiplication can be roughly divided into four categories according to the different bases of the design: multiplication based on standard base, multiplication based on normal base, multiplication based on double base and multiplication based on triangular base. [0003] Finite field multiplication requires irreducible polynomials to pa...

Claims

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Application Information

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IPC IPC(8): G06F7/523
CPCG06F7/523
Inventor 易海博聂哲
Owner SHENZHEN POLYTECHNIC
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