A charge pump circuit

Abstract

The invention discloses a charge pump circuit. The charge pump circuit comprises a basic charge pump circuit, a transmission isolation circuit, a sampling circuit and a decoder module, wherein the basic charge pump circuit is used for converting a low-voltage direct current into a second high-voltage output V2 under the control of a clock signal, and connecting to the decoder module, the transmission isolation circuit is used for isolating and outputting the second high-voltage output V2 of the basic charge pump circuit so as to generate a first high voltage output V1 with a slightly low voltage, the sampling circuit is used for sampling the first high-voltage output V1 so as to obtain a sampling voltage, comparing the sampling voltage with a reference voltage and outputting a digitized clock control signal ENCLK to the basic charge pump circuit, the decoder module is used for respectively connecting the second high-voltage output V2 and the first high-voltage output V1 to a control gate and a word line of a selected unit under the control of the control signal. Through adoption of the charge pump circuit, the charge pump with the first high-voltage output V1 and the high-voltage output V2 is shared, and the area of a chip is reduced.

Description

technical field [0001] The invention relates to a charge pump circuit, in particular to a charge pump circuit of a P-type mirror bit flash memory. Background technique [0002] In semiconductor storage devices, electrically erasable programmable read-only memory (EEPROM) (flash memory) is a volatile memory, and belongs to Erasable Programmable Read-Only Memory (EPROM). The advantage of the electrically erasable programmable read-only memory (EEPROM) is that it can erase the entire memory block, and the erasing speed is fast, which takes about one to two seconds. Therefore, in recent years, Electrically Erasable Programmable Read-Only Memory (EEPROM) has been used in various consumer electronic products, such as digital cameras, digital video cameras, mobile phones or notebook computers. [0003] figure 1 It is a structural schematic diagram of an N-type electrically erasable programmable read-only memory cell with a mirrored bit in the prior art. The N-type electrically e...

AI Technical Summary

Problems solved by technology

[0008] Existing charge pumps need to generate V1 and V2 separately, so the circuit can only be designed according to their respective maximum loads. In actual operation, it is rare for V1 and V2 to have maximum loads at the same time. Even if they do, capacitors can be used to maintain them. , this design will result in a waste of area

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