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Data unit array structure of NAND flash memory and manufacturing method thereof

A technology of data unit and array structure, which is applied in the direction of electrical components, electric solid-state devices, circuits, etc., can solve the problems of data unit reading interference, etc., achieve small off current, good process size continuous reduction ability, and solve reading interference Effect

Active Publication Date: 2017-10-03
SHANGHAI FUDAN MICROELECTRONICS GROUP
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AI Technical Summary

Problems solved by technology

[0009] The invention provides a data unit array structure of NAND flash memory and a manufacturing method thereof, which has a good capability of continuously shrinking the process size and solves the problem of reading interference of data units

Method used

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  • Data unit array structure of NAND flash memory and manufacturing method thereof
  • Data unit array structure of NAND flash memory and manufacturing method thereof
  • Data unit array structure of NAND flash memory and manufacturing method thereof

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Embodiment Construction

[0119] based on the following Figure 3 ~ Figure 15 , specifically explain the preferred embodiment of the present invention.

[0120] The invention provides a data unit array structure of NAND flash memory. The data unit array structure of NAND flash memory is manufactured by adopting fin field effect transistor technology, and the data unit is a tunneling field effect transistor (TFET).

[0121]TFET is a simple P-I-N diode with gate control, which is a diode that works under reverse bias conditions. The working mechanism of a MOSFET depends on whether the carriers flow in the channel, but a TFET uses the band-to-band tunneling current as its working mechanism. In the OFF state, the potential barrier between source and channel is wide, no BTBT occurs, and only very small leakage current exists. However, when the gate voltage exceeds the threshold voltage, the potential barrier between the channel and the source becomes narrow enough to allow a large tunnel current to flow, ...

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Abstract

The invention provides a data unit array structure of an NAND flash memory and a manufacturing method thereof. A fin is formed on a semiconductor substrate. The fin comprises a source layer, a channel layer and a drain layer or comprises a source layer and a drain layer, wherein the source layer, the channel layer and the drain layer are stacked in a vertical direction. A number of stacked structures are formed on the fin. The stacked structures comprise a tunnelling dielectric layer which covers the top and both sides of the fin, a charge trap layer covering the top and both sides of the tunnelling dielectric layer, a gate dielectric layer covering the top and both sides of the charge trap layer, and a gate covering the top and both sides of the gate dielectric layer. A string source which is connected with the source layer is formed on one end of the fin. A string drain which is connected with the drain layer is formed on the other end of the fin. According to the invention, the data unit array structure can continuously reduce the process size; the problem of reading interference of a data unit is solved; the data unit uses a TFET which is a device with double gates and has the advantages of fast switching speed and low shutdown current; and the data unit formation method is compatible with a traditional FinFET process, which simplifies the process and reduces the process cost.

Description

technical field [0001] The invention relates to a data unit array structure of NAND flash memory and a manufacturing method thereof, in particular to a method for manufacturing the data unit array structure of NAND flash memory by using a Fin Field Effect Transistor process and the obtained TFET data unit array structure. Background technique [0002] NAND flash is a non-volatile flash memory technology developed by Toshiba Corporation. It has a high cell density, can achieve high storage density, and has fast writing and erasing speeds. The unit size of NAND flash is almost half of that of NOR devices, which can provide higher capacity within a given die size, has fast writing and erasing speeds, and its main function is to store data. It is currently mainly used in digital camera flash memory card and MP3 player. [0003] Such as figure 1 As shown, the existing NAND flash memory includes a channel region 1 located on a semiconductor substrate, a tunnel dielectric layer 2...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11517H01L27/11521H10B41/00H10B41/30
CPCH10B69/00
Inventor 黄新运肖磊沈晔晖沈磊刘岐刘红霞
Owner SHANGHAI FUDAN MICROELECTRONICS GROUP
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