Data unit array structure of NAND flash memory and manufacturing method thereof
A technology of data unit and array structure, which is applied in the direction of electrical components, electric solid-state devices, circuits, etc., can solve the problems of data unit reading interference, etc., achieve small off current, good process size continuous reduction ability, and solve reading interference Effect
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[0119] based on the following Figure 3 ~ Figure 15 , specifically explain the preferred embodiment of the present invention.
[0120] The invention provides a data unit array structure of NAND flash memory. The data unit array structure of NAND flash memory is manufactured by adopting fin field effect transistor technology, and the data unit is a tunneling field effect transistor (TFET).
[0121]TFET is a simple P-I-N diode with gate control, which is a diode that works under reverse bias conditions. The working mechanism of a MOSFET depends on whether the carriers flow in the channel, but a TFET uses the band-to-band tunneling current as its working mechanism. In the OFF state, the potential barrier between source and channel is wide, no BTBT occurs, and only very small leakage current exists. However, when the gate voltage exceeds the threshold voltage, the potential barrier between the channel and the source becomes narrow enough to allow a large tunnel current to flow, ...
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