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A vdmos device with anti-single event effect

An anti-single-event effect and device technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problem of limited anti-single-event effect capability, improve anti-single-event gate-through capability, reduce on-resistance, Miller Capacitance reduction effect

Active Publication Date: 2019-11-01
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

But for this structure, when the single particle is incident on the position of the second conductivity type semiconductor pillar, it can obtain better anti-single event effect ability, and when the single particle is incident on other positions, such as the body contact area, the anti-single event effect ability is limited. very limited improvement

Method used

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  • A vdmos device with anti-single event effect
  • A vdmos device with anti-single event effect
  • A vdmos device with anti-single event effect

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Embodiment Construction

[0020] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0021] Such as image 3 As shown, a VDMOS device with anti-single event effect is stacked sequentially from bottom to top with a drain metal electrode 10, a heavily doped first conductivity type semiconductor substrate 9, a first conductivity type semiconductor epitaxial layer 8, and a source metal Electrode 1; the first conductivity type semiconductor epitaxial layer 8 has a second conductivity type semiconductor body region 6, a sec...

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Abstract

The present invention provides a VDMOS device with anti-single event effect. The technical solution adopted in the present invention is mainly to arrange a first conductive type semiconductor buried layer in the second conductive type semiconductor body region to generate a hole barrier and prevent hole flow. Through the second conductivity type semiconductor body region, and the second conductivity type semiconductor column connected to the source is provided in the epitaxial layer under the gate to provide a hole path, and the present invention greatly improves the incidence of single particles incident on all positions. The anti-single event burning ability of VDMOS and the anti-single event gate punching ability can also be well improved. In addition, the anti-single event effect VDMOS device proposed in the present invention can effectively reduce the breakdown voltage of the device under the premise of ensuring the breakdown voltage. On-resistance, and because the coverage area of ​​the gate electrode is reduced, the Miller capacitance of the VDMOS structure is greatly reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductor devices, in particular to a VDMOS device with anti-single event effect. Background technique [0002] With the rapid development of power electronics technology to high-frequency and high-power applications, VDMOS has become one of the irreplaceable important devices in the field of power electronics, and power electronic circuits using VDMOS are increasing. The device with this structure is usually formed by secondary diffusion or ion implantation technology. It is a multi-cell device, easy to integrate, high power density, multi-carrier conduction, and good frequency characteristics. At present, VDMOS is one of the mainstream devices of power MOS. As a power switch, VDMOS has the advantages of high withstand voltage, fast switching speed, low on-resistance, low drive power, good thermal stability, low noise and simple manufacturing process, and is widely used in switching power supplies, ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/06H01L29/78
CPCH01L29/0634H01L29/7811
Inventor 任敏林育赐苏志恒谢驰李泽宏张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA