A vdmos device with anti-single event effect
An anti-single-event effect and device technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problem of limited anti-single-event effect capability, improve anti-single-event gate-through capability, reduce on-resistance, Miller Capacitance reduction effect
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[0020] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.
[0021] Such as image 3 As shown, a VDMOS device with anti-single event effect is stacked sequentially from bottom to top with a drain metal electrode 10, a heavily doped first conductivity type semiconductor substrate 9, a first conductivity type semiconductor epitaxial layer 8, and a source metal Electrode 1; the first conductivity type semiconductor epitaxial layer 8 has a second conductivity type semiconductor body region 6, a sec...
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