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Process method for optimizing white pixel of CIS-UTS device

A CIS-UTS, white pixel technology, applied in electrical solid device, semiconductor device, semiconductor/solid state device manufacturing, etc., can solve problems such as yield failure, improve stability, reduce white pixel points, and increase device depth Effect

Inactive Publication Date: 2017-12-01
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In the original process, the median value of WP Count is around 620, and the high value of WP Wafer Edge (wafer edge) is likely to cause yield failure

Method used

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  • Process method for optimizing white pixel of CIS-UTS device

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Embodiment Construction

[0023] Provide the specific embodiment of the present invention below in conjunction with accompanying drawing, but the present invention is not limited to following embodiment. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that the drawings are all in a very simplified form and use imprecise ratios, which are only used for the purpose of conveniently and clearly assisting in describing the embodiments of the present invention.

[0024] The invention discloses a process method for reducing white pixel points of a CIS device. Since CIS products are mainly used for imaging, white pixels are an important indicator of imaging quality. In the existing 55nm CIS-UTS process technology, P-type EPI (Epitaxy, epitaxial layer) is used as the substrate, and the pixel area product (Pixel Wafer) EPI is now transformed into an N-type substrate by ion implantation, and other processes remain unchanged. In orde...

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Abstract

The invention provides a process method for optimizing white pixels of a CIS-UTS device. The method comprises the following steps: providing a semiconductor substrate; using an ion injection method to make a pixel region silicon wafer epitaxial layer into an N-type substrate by injection; performing an active region manufacturing process and a subsequent manufacturing process. The process method for optimizing white pixels of a CIS-UTS device makes a pixel region silicon wafer epitaxial layer into an N-type substrate by an ion injection method aimed at a condition that the number of white pixel points is high in an existing process, and device depth of a pixel region is increased, so as to improve stability of a CIS device and reduce white pixel points. Using the process method, a wafer EPI type can be simply and effectively changed through ion injection, not involving other influence. The method can effectively reduce the white pixel points of a CIS device, and does not influence other parameters.

Description

technical field [0001] The present invention relates to the field of semiconductor integrated circuit manufacture, relate to the manufacturing process of IMP (Implant, ion implantation), and particularly relate to a kind of processing method of optimizing white pixel of CIS-UTS device. Background technique [0002] Since Bell Laboratories in the United States proposed the concept of solid-state imaging devices in the late 1960s, solid-state image sensors have developed rapidly and become an important branch of sensing technology. It is an indispensable peripheral for personal computer multimedia and a core device in monitoring equipment. In recent years, due to the improvement of integrated circuit design technology and process level, CIS (CMOS IMAGE SENSOR, Complementary Metal Oxide Semiconductor Image Sensor) has inherent advantages such as intra-pixel amplification, column parallel structure, high integration, single power supply and Features such as low-voltage power su...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/265H01L27/146
CPCH01L21/26506H01L27/14683
Inventor 范洋洋何亮亮
Owner SHANGHAI HUALI MICROELECTRONICS CORP