Eureka AIR delivers breakthrough ideas for toughest innovation challenges, trusted by R&D personnel around the world.

Laterally diffused MOS device

A MOS device, lateral double diffusion technology, applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems of substrate-assisted depletion, depletion by the substrate, unable to achieve the optimization of the electric field in the drift region, etc. The effect of uniform distribution of blocking voltage and electric field

Active Publication Date: 2018-01-09
UNIV OF ELECTRONICS SCI & TECH OF CHINA
View PDF5 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to the substrate-assisted depletion effect, the effects of RESURF technology and super-junction LDMOS are greatly affected.
The reason is that the potentials at different positions in the drift region are different, so the degree of depletion by the substrate is different. If the drift region adopts a uniform thickness, the optimization of the electric field in the drift region cannot be achieved.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Laterally diffused MOS device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0016] In this embodiment, the semiconductor of the first conductivity type is a P-type semiconductor, the semiconductor of the second conductivity type is an N-type semiconductor, and the charges stored in the polysilicon island 212 are negative charges.

[0017] A kind of lateral double diffusion MOS device, comprises P-type semiconductor substrate 201 and the P-type semiconductor body region 203 and N-type semiconductor drift region 202 that are arranged on the upper surface of P-type semiconductor substrate 201, P-type semiconductor body region 203 and N-type The semiconductor drift region 202 is side contacted; the inner upper surface of the P-type semiconductor body region 203 has an N-type semiconductor source region 205 and a highly doped P-type semiconductor body contact region 204; the N-type semiconductor source region 205 and the highly doped P The P-type semiconductor body contact region 204 is in direct contact with the metal source 207 located on its upper surfac...

Embodiment 2

[0023] In this embodiment, the semiconductor of the first conductivity type is an N-type semiconductor, the semiconductor of the second conductivity type is a P-type semiconductor, and the charges stored in the polysilicon island 212 are positive charges.

[0024]A lateral double-diffused MOS device, comprising an N-type semiconductor substrate 201 and an N-type semiconductor body region 203 and a P-type semiconductor drift region 202 arranged on the upper surface of the N-type semiconductor substrate 201, and an N-type semiconductor body region 203 and a P-type semiconductor region. The semiconductor drift region 202 is side contacted; the upper surface of the N-type semiconductor body region 203 has a P-type semiconductor source region 205 and a highly doped N-type semiconductor body contact region 204; the P-type semiconductor source region 205 and the highly doped N The N-type semiconductor body contact region 204 is in direct contact with the metal source 207 located on it...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a laterally diffused MOS device. The device comprises a first conductive type semiconductor substrate, a first conductive type semiconductor body region, a second conductive type semiconductor drift region, a second conductive type semiconductor source region, a highly-doped first conductive type semiconductor body contact region, a gate structure, wherein the gate structurecomprises a polysilicon gate electrode and a gate oxide layer; at least two polysilicon islands are arranged on the upper surface of the interior of the second conductive type semiconductor drift region, and uniformly-distributed charges are stored in the polysilicon islands; and the distance from the bottom of the polysilicon islands to the first conductive type semiconductor substrate is increased gradually in the direction from the first conductive type semiconductor body region to a second conductive type semiconductor drain region. By setting the multiple polysilicon islands of differentdepths and for storing charges in the drift region, and by changing the charge quantity and the width of the drift region needing to be depleted, the electric field distribution in the drift region is more uniform, and the reverse blocking voltage of the device is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor devices, in particular to a lateral double-diffusion MOS device. Background technique [0002] Metal oxide power MOS semiconductor devices, with the rapid development of the semiconductor industry, power electronics technology represented by high-power semiconductor devices has developed rapidly, and its application fields have continued to expand, such as the control of AC motors and printer drive circuits. Among various power devices today, laterally diffused MOS devices (LDMOS) have the advantages of high operating voltage and easy integration, so they are widely used. [0003] In the design of LDMOS devices, the breakdown voltage and on-resistance have always been the main goals that people pay attention to when designing such devices. The thickness of the epitaxial layer, doping concentration, and the length of the drift region are the most important parameters of LDMOS. The traditiona...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06
CPCH01L29/7816H01L29/404H01L29/407
Inventor 任敏林育赐谢驰李佳驹李泽宏张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Eureka Blog
Learn More
PatSnap group products