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Silicon epitaxial wafer production process of 8-inch power chip

A technology of silicon epitaxial wafer and production process, which is applied in the directions of crystal growth, single crystal growth, single crystal growth, etc., can solve the problems affecting the popularization and application of silicon epitaxial wafers, inconvenient silicon epitaxial wafer resistivity uniformity, doping, etc. Achieve the effect of reducing the self-dilution effect of impurities, improving uniformity and reducing the concentration of self-doping impurities

Active Publication Date: 2018-02-16
四川广瑞半导体有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Resistivity is an important parameter of silicon epitaxial wafers in power chips. When existing silicon single crystal substrates undergo epitaxial growth, due to serious doping phenomena, it is not convenient to control the uniformity and consistency of silicon epitaxial wafer resistivity. It has affected the promotion and application of silicon epitaxial wafers

Method used

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  • Silicon epitaxial wafer production process of 8-inch power chip
  • Silicon epitaxial wafer production process of 8-inch power chip
  • Silicon epitaxial wafer production process of 8-inch power chip

Examples

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Embodiment 1

[0040] Such as figure 1 As shown, the silicon epitaxial wafer production process for 8-inch power chips includes the following steps in sequence: step 1, the silicon substrate material is cleaned with pure water and then placed in the reactor; step 2, hydrogen is used as the carrier gas to discharge The air in the reactor; step 3, raise the temperature inside the reactor to 1160°C, then use HCL to etch for 4 minutes, and then remove the HCL inside the reactor; step 4, lower the temperature inside the reactor to the growth temperature of 1025°C Step 5, feed silane and dopant into the reactor, so that the surface of the silicon substrate generates a silicon single crystal layer, and obtain a silicon epitaxial wafer; Step 6, stop feeding the reaction gas into the reactor, and wait for the reactor inside to drop When the temperature reaches room temperature, nitrogen gas is introduced into the reactor for 3-4 minutes; step 7, the reactor is opened to take out the silicon epitaxial...

Embodiment 2

[0048] The difference between this example and Example 1 is that in this example, in step 3, the temperature inside the reactor was raised to 1180° C., HCL was etched for 3 minutes, and in step 4, the temperature inside the reactor was lowered to 1020° C. In this embodiment, when the epitaxial layer is grown, the resistivity uniformity is less than 6%.

Embodiment 3

[0050] The difference between this example and Example 1 is that in this example, in step 3, the temperature inside the reactor was raised to 1170° C., HCL was etched for 3.5 minutes, and in step 4, the temperature inside the reactor was lowered to 1030° C. In this embodiment, when the epitaxial layer is grown, the resistivity uniformity is less than 6%.

[0051] Further, please refer to image 3 , the horizontal reactor is provided with a radio frequency coil adjustment structure, and the radio frequency coil adjustment structure includes:

[0052] The first fixed ring 11, the second fixed ring 12, two pulleys 13, and the cross bar 14; the outer surface of the reactor is provided with a chute, the pulleys are embedded in the chute, and the first fixed ring and the second fixed ring are both set Set on the outer surface of the reactor, the first fixed ring and the second fixed ring are slidingly connected to the reactor through pulleys respectively. The cross bar is made of e...

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Abstract

The invention discloses a silicon epitaxial wafer production process of an 8-inch power chip. The process sequentially comprises the following steps of 1, cleaning a silicon substrate material by purewater; then, putting the silicon substrate material into a reactor; 2, using hydrogen gas as current carrying gas to exhaust air in the reactor; 3, raising the temperature inside the reactor to 1160to 1180 DEG C; then, using HCL for etching for 3 to 4min; next, eliminating HCL inside the reactor; 4, lowering the temperature inside the reactor to the growth temperature of 1020 to 1030 DEG C; 5, introducing silane and doping agents into the reactor, so that a silicon monocrystal layer grows on the surface of the silicon substrate to obtain a silicon epitaxial wafer; 6, stopping the introduction of reaction gas into the reactor; when the temperature inside the reactor lowers to the room temperature, introducing the nitrogen gas into the reactor for 3 to 4min; 7, opening the reactor to takeout the silicon epitaxial wafer. The silicon epitaxial wafer production process has the advantages that the integral process is simple; the realization is convenient; the cost is low; during the application, the uniformity and consistency of the electrical resistivity of the produced silicon epitaxial wafer can be improved.

Description

technical field [0001] The invention relates to the preparation technology of semiconductor materials, in particular to the silicon epitaxial wafer production technology of 8-inch power chips. Background technique [0002] In recent years, my country's electronic information industry has maintained a sustained and rapid development momentum. As the production capacity and consumption capacity of electronic consumer products continue to increase, and the international semiconductor industry giants transfer their integrated circuit industry to the mainland of my country, my country's integrated circuit industry is booming. With the positioning of emerging industries in the national strategy, the development of electric vehicles, 3G base station construction, wind power and other industries will further promote the rapid development of domestic integrated circuits. The semiconductor silicon material industry and the semiconductor discrete device industry are important component...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): C30B25/20C30B25/08C30B25/14C30B25/10C30B29/06
CPCC30B25/08C30B25/10C30B25/14C30B25/20C30B29/06
Inventor 王作义康宏马洪文胡宝平陈小铎崔永明卞小玉
Owner 四川广瑞半导体有限公司
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