Unlock instant, AI-driven research and patent intelligence for your innovation.

Silicon Epitaxial Wafer Manufacturing Technology for Insulated Gate Bipolar Transistor

A bipolar transistor, silicon epitaxial wafer technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of epitaxial layer resistivity deviation from target parameters, buried layer pattern drift, device deviation characteristics, etc. Reduce the self-dilution effect of impurities, shorten the production cycle, and improve the effect of uniformity

Active Publication Date: 2019-02-12
四川广瑞半导体有限公司
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The main reason is the self-doping phenomenon, which makes the resistivity of the epitaxial layer deviate from the target parameter, N + / P + A wide slowly changing impurity transition zone is formed at the interface, and the wide width of the transition zone will cause the buried layer pattern to drift and the P-N junction to move to the epitaxial layer. In severe cases, even an inversion interlayer will be formed, causing the device to deviate from the characteristics and reduce the reliability.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Silicon Epitaxial Wafer Manufacturing Technology for Insulated Gate Bipolar Transistor
  • Silicon Epitaxial Wafer Manufacturing Technology for Insulated Gate Bipolar Transistor
  • Silicon Epitaxial Wafer Manufacturing Technology for Insulated Gate Bipolar Transistor

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0036] Such as figure 1 As shown, the silicon epitaxial wafer production process of the insulated gate bipolar transistor includes the following steps in sequence: step 1, the silicon substrate material is cleaned with pure water and then placed in the reactor; step 2, hydrogen is used as the carrier The gas is discharged from the air in the reactor; step 3, the temperature inside the reactor is raised to 1160°C, and then etched with HCL for 4 minutes, and then the HCL inside the reactor is removed; step 4, the temperature inside the reactor is lowered to 1135°C Growth temperature; step five, feed into the reactor a reaction gas composed of a mixture of hydrogen and silicon tetrachloride gas, so that a silicon single crystal layer is formed on the surface of the silicon substrate to obtain a silicon epitaxial wafer; step six, stop feeding the reactor into the reactor Feed the reaction gas, and when the inside of the reactor drops to room temperature, feed nitrogen gas into the...

Embodiment 2

[0044] The difference between this example and Example 1 is that in this example, in step 3, the temperature inside the reactor was raised to 1180° C., HCL was etched for 3 minutes, and in step 4, the temperature inside the reactor was lowered to 1130° C. In this embodiment, the transition zone of the 10 μm epitaxial layer is 0.66 μm, compared with the silicon epitaxial wafer transition zone of 3 μm or more prepared by the usual process, the width of the transition zone is significantly reduced.

Embodiment 3

[0046] The difference between this example and Example 1 is that in this example, in step 3, the temperature inside the reactor was raised to 1170° C., HCL was etched for 3.5 minutes, and in step 4, the temperature inside the reactor was lowered to 1140° C. In this embodiment, the transition zone of the 10 μm epitaxial layer is 0.70 μm, which is significantly smaller than the transition zone of the silicon epitaxial wafer prepared by the usual process with a transition zone of 3 μm or more.

[0047] Further, please refer to image 3 , the horizontal reactor is provided with a radio frequency coil adjustment structure, and the radio frequency coil adjustment structure includes:

[0048] The first fixed ring 11, the second fixed ring 12, two pulleys 13, and the cross bar 14; the outer surface of the reactor is provided with a chute, the pulleys are embedded in the chute, and the first fixed ring and the second fixed ring are both set Set on the outer surface of the reactor, the...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a production technology of a silicon epitaxy wafer of an insulated gate bipolar transistor. The production technology of a silicon epitaxy wafer of an insulated gate bipolar transistor includes the following steps: 1) cleaning the silicon substrate material by means of pure water, and then putting the silicon substrate material in a reactor; 2) taking hydrogen as current carrying gas to discharge the air in the reactor; 3) heating the internal of the reactor to 1160-1180 DEG C, and then using HCL to etch for 3-4 min, and then eliminating the HCL in the reactor; 4) reducing the temperature in the reactor to the 1130-1140 DEG C growth temperature; 5) filling the reactor with the reaction gas which is formed by mixing of hydrogen and silicon tetrachloride gas so as toenable the surface of the silicon substrate to generate a silicon single-crystal layer to obtain a silicon epitaxy wafer; 6) stopping filling the reactor with the reaction gas, filling the reactor with nitrogen for 3-4 min when the internal temperature of the reactor is reduced to the room temperature; and 7) opening the reactor and taking out the silicon epitaxy wafer. The production technology of a silicon epitaxy wafer of an insulated gate bipolar transistor has the advantages of being simple in the overall technology, being convenient for implementation, being low in cost, and being able to reduce the width of the transition region of the N+ / P+ interface during the application process.

Description

technical field [0001] The invention relates to the preparation technology of semiconductor materials, in particular to the silicon epitaxial wafer production technology of insulated gate bipolar transistors. Background technique [0002] In recent years, with the continuous development of consumer electronics products, more and more devices are applied to insulated gate bipolar transistors (IGBTs). The main structure of the insulated gate bipolar transistor is N - / N + / P + The heterogeneous structure of which, P + is the substrate part, N - / N + For the epitaxial growth part. When epitaxial growth is carried out on a heavily doped substrate, the uniformity and controllability of the longitudinal and radial distribution of resistivity become poor. The main reason is the self-doping phenomenon, which makes the resistivity of the epitaxial layer deviate from the target parameter, N + / P + A wide slowly changing impurity transition zone is formed at the interface, and...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/02H01L21/223
CPCH01L21/02381H01L21/02532H01L21/02634H01L21/02661H01L21/223
Inventor 王作义康宏马洪文胡宝平陈小铎崔永明卞小玉
Owner 四川广瑞半导体有限公司
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More