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FPGA-based DMX512 signal efficient caching concurrent system

A DMX512, signal sending and receiving technology, applied in memory systems, instruments, electrical digital data processing, etc., can solve the problems of low synchronization of multiple groups of systems, increase engineering costs, reduce system stability, etc., and achieve efficient and stable data conversion, good versatility

Active Publication Date: 2018-04-17
CHINA JILIANG UNIV
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Problems solved by technology

The existing DMX512 signal transceiver system can only handle a single light signal package. In a lighting system with a large amount of data and a wide control range, multiple sets of DMX512 signal transceiver systems are required to complete the light signal control, which increases the project cost. The synchronization between them is not high, which reduces the stability of the entire system

Method used

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  • FPGA-based DMX512 signal efficient caching concurrent system
  • FPGA-based DMX512 signal efficient caching concurrent system
  • FPGA-based DMX512 signal efficient caching concurrent system

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Embodiment 1

[0024] Such as figure 1 As shown, the FPGA-based DMX512 signal high-efficiency cache concurrent system of the present invention includes database, data input interface, storage module 1 (SRAM 1), storage module 2 (SRAM 2), data temporary storage module and 8 DMX512 data output modules ; wherein the database is used to provide the current storage module serial number, read enable signal, read address signal, DMX512 data frame, data temporary storage byte number, DMX512 data update time; wherein the data input interface is connected with storage module 1 and storage module 2, Storage module 1 and storage module 2 are connected to the data temporary storage module, and the data temporary storage module is connected to 8 DMX512 data output modules;

[0025] Such as figure 2 As shown, an FPGA-based DMX512 signal high-efficiency buffer concurrent transceiver method includes the following steps:

[0026] (1), FPGA reads the serial number of the current storage module from the data...

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Abstract

The present invention provides an FPGA-based DMX512 signal efficient caching concurrent system. The system comprises a database, a data input interface, a storage module 1, a storage module 2, a datatemporary storage module and 8 DMX512 data output modules. The database is used to provide the current storage module serial number, a read enable signal, a read address signal, a DMX512 data frame, adata temporarily stored byte number, and the DMX512 data update time; and the data input interface is connected with the storage module 1 and the storage module 2, the storage module 1 and the storage module 2 are connected with the data temporary storage module, and the data temporary storage module is connected with 8 DMX512 data output modules. According to the system provided by the present invention, 8 light signal data packets can be converted into 8 standard DMX512 signals to be output in parallel, and the system has highly efficient and stable data conversion characteristics, is compatible with different models of FPGA chip migration codes, and has good versatility.

Description

technical field [0001] The invention relates to signal processing and signal storage technology, in particular to an FPGA-based DMX512 signal high-efficiency buffering concurrent system. Background technique [0002] The DMX512 protocol was developed by the USITT (United States Society of Theater Technology) as a way to control dimmers with a standard digital interface from a console. At present, all kinds of stage effect lamps, dimming controllers and smart lamps including smart lamps fully support the DMX512 protocol. Dimming lamps have fully realized digital control, and on this basis, they are gradually becoming computerized and networked. The DMX512 signal high-efficiency buffer concurrent system can receive multiple light signal packets, and then convert multiple signal packets into standard DMX512 signal parallel output. [0003] With the rapid development of stage lighting and urban lighting projects, the requirements for big data and high-efficiency lighting contro...

Claims

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Application Information

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IPC IPC(8): G06F12/0884
CPCG06F12/0884
Inventor 张淑琴郑慧伟谢沛杨琳孟庆阳杨润光陈亮黄军
Owner CHINA JILIANG UNIV
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