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A method for merging and transmitting dma data in gpdsp

A transmission method and technology of transmission mode, applied in the field of DMA data merge transmission in GPDSP, can solve the problems of reducing data transmission speed, insufficient calculation accuracy and addressing space, overhead and waste of power consumption, etc., to reduce the number of visits and page change The number of times, the effect of improving access efficiency and write hit rate, reducing overhead and power consumption

Active Publication Date: 2020-01-14
NAT UNIV OF DEFENSE TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] General scientific computing requires high-performance DSP, but traditional DSP has the following disadvantages when used in scientific computing: ①The bit width is small, which makes the calculation accuracy and addressing space insufficient, and general scientific computing applications require at least 64-bit precision; ②Lack of task management, Software and hardware support such as file control, process scheduling, and interrupt management, or the lack of operating system hardware environment, brings inconvenience to the management of general-purpose and multi-channel computing tasks; The support of etc. basically relies on assembler programming, which is not convenient for general-purpose programming; ④ does not support the program debugging mode of the local host, and only relies on cross-debugging simulation of other machines
Since the DMA technology overlaps the calculation operation of the core and the data movement operation of the storage unit, it reduces the impact of the data transmission speed between the internal storage unit and the external storage unit on the GPDSP processing performance to a certain extent.
However, as the number of processing cores integrated in GPDSP continues to increase, the existing DMA data transmission methods can no longer meet the data volume requirements of multi-core parallel processing. Efficient multi-core DMA involves the memory access requirements of applications and the hardware structure of multi-core GPDSP. characteristic
[0007] When common algorithms such as matrix multiplication, fast Fourier transform, and HPL (High Performance Linpack) are implemented in parallel on the multi-core GPDSP, one or more cores need to write data to the external storage space DDR at the same time, such as matrix multiplication (C+ The updated C matrix in multiple cores in = AB) needs to be written back to the external storage space DDR. If traditional DMA point-to-point core-to-core transmission is used, multiple DMAs need to be started, and each core The distance to the DDR storage space outside the core is different, and the data written by multiple cores may be on different DDR pages, which undoubtedly increases the number of DDR page changes and increases the transmission delay. Write efficiency; at the same time, the above-mentioned traditional DMA transmission method needs to start multiple DMAs, resulting in redundant overhead and waste of power consumption, and increases congestion to the network on chip

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  • A method for merging and transmitting dma data in gpdsp
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  • A method for merging and transmitting dma data in gpdsp

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Embodiment Construction

[0032] The present invention will be further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

[0033] Such as Figure 1 to Figure 5 As shown, the DMA data merge transmission method in the GPDSP of this embodiment includes: when the DMA data merge transfer needs to be performed, the DMA that initiates the DMA data merge transfer transaction is used as the main DMA, and generates read requests corresponding to multiple participating cores and sends them to the on-chip Network: Each participating core (DSP core) participating in the transmission receives the corresponding read request from the on-chip network as a slave DMA, and counts when returning data to the on-chip network until the end of the transmission transaction.

[0034] In this embodiment, through the above method, the DMA that initiates the transfer is responsible for the generation of the read...

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Abstract

The present invention discloses a DMA data merging transmission method in the GPDSP. The method comprises: when DMA data merging transmission need to be performed, taking a DMA that initiates a DMA data merging transmission transaction as a master DMA, generating a read request corresponding multiple participating cores, and sending the read request to the on-chip network; and taking each participating core participating in the transmission as a slave DMA to receive the corresponding read request from the on-chip network, and counting the number of times until the transmission transaction ends when the data is returned to the on-chip network. According to the method disclosed by the present invention, data merging transmission can be implemented by starting a DMA transaction for one time,and the implementation method is simple, and has a low cost, high data transmission and DDR write efficiency, low DMA overhead, low power consumption, and large data transmission bandwidth.

Description

technical field [0001] The present invention relates to the technical field of GPDSP (General Purpose Digital Signal Processor, general purpose digital signal processor), in particular to a kind of DMA (Director Memory Access, direct memory access) data merge transmission method in GPDSP. Background technique [0002] Digital Signal Processor (Digital Signal Processor, DSP) is widely used in embedded systems as a typical embedded microprocessor. , has brought great opportunities to the development of signal processing, and its application fields have expanded to all aspects of military and economic development. In the application fields of modern communication, image processing and radar signal processing, as the amount of data processing increases, the requirements for calculation accuracy and real-time performance increase, and it is usually necessary to use a higher-performance microprocessor for processing. [0003] General scientific computing requires high-performance...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/28G06F15/78
CPCG06F13/28G06F15/7825Y02D10/00
Inventor 马胜雷元武张美迪万江华陈胜刚李勇彭元喜孙书为
Owner NAT UNIV OF DEFENSE TECH