Layout method of dynamic reconfigurable FPGA

A layout method and dynamic technology, applied in special data processing applications, instruments, electrical digital data processing, etc., can solve problems such as single model layout, achieve the effects of reducing external fragments, improving utilization, and enhancing flexibility

Active Publication Date: 2018-07-06
XI AN JIAOTONG UNIV
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Problems solved by technology

[0007] The technical problem to be solved by the present invention is to provide a d

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  • Layout method of dynamic reconfigurable FPGA
  • Layout method of dynamic reconfigurable FPGA
  • Layout method of dynamic reconfigurable FPGA

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Embodiment Construction

[0047] The present invention is a layout method of dynamically reconfigurable FPGA, constructs computing resources of FPGA dynamically reconfigurable system, and establishes a single hardware task T n In the FPGA online layout process, the FF Reshaped-Task-Model scheduling algorithm is used to deform the task model to complete the layout and improve the utilization of FPGA resources.

[0048] Include the following steps:

[0049] S1. Define the size of resources in the reconfigurable area;

[0050] see figure 1 , FPGA(W,H) represents the computing resource of the dynamic reconfigurable system, W represents the width of the reconfigurable resource, H represents the height of the reconfigurable resource, W×H represents the size of the reconfigurable resource, then:

[0051]

[0052] S2. Establish a Reshaped-Task-Model model based on a single hardware task

[0053] see figure 2 , a single hardware task uses T n =(a, e, d, w, h) means that a is the arrival time of the tas...

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Abstract

The invention discloses a layout method of dynamic reconfigurable FPGA. The method comprises the steps that calculation resources of an FPGA dynamic reconfigurable system are constructed, a bit map method is adopted to conduct management of the FPGA calculation resources, a task model of a single hardware task Tn is established, and during the process of FPGA online layout, deformation is conducted on a task model by using an FF Reshaped-Task-Model scheduling model to complete layout. According to the method, a strategy of changeable task model is introduced in the process of FPGA online layout, under the situation that the first layout fails, the shape of an online task is changed, a layout algorithm is scheduled again, the flexibility of a task is increased due to the fact that the shapeof the task is changeable, the selectivity of the task when layout is performed is improved, so that the success rate of task layout is increased, and the utilization rate of the FPGA resources is increased.

Description

technical field [0001] The invention belongs to the technical field of reconfigurable computing, in particular to an online layout method of FPGA (Field-Programmable Gate Array) field programmable gate array. Background technique [0002] In the era of big data, the amount of data is growing exponentially, which requires faster and more complex processing of data. FPGA has a wider range of applications, mainly including; 5G wireless communication, radar and aerospace, cloud computing, artificial intelligence, smart city and driverless technology. These fields are all facing the challenges of a sudden increase in data volume and more complex calculations. FPGA has incomparable advantages in solving such data acceleration problems. According to the latest data released by the Semiconductor Industry Association SIA, global semiconductor sales reached US$35 billion in August 2017, a record high in monthly sales, with a growth rate of 24%. According to the latest report releas...

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Application Information

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IPC IPC(8): G06F17/50
CPCG06F30/392G06F2119/18
Inventor 伍卫国秦朝楠赵东方王今雨王倩徐一轩李桢华崔舜
Owner XI AN JIAOTONG UNIV
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