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A Graphics Processor Unified Coloring Array Low Power Gated Clock

A graphics processor and gated clock technology, applied in the direction of processor architecture/configuration, etc., can solve the problems of inability to guarantee circuits, rapid replacement of commercial GPU chips, inability to fully utilize GPU functions and performance, and achieve enhanced flexibility. Effect

Active Publication Date: 2021-10-15
XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, there is no GPU based on a unified dyeing architecture in my country, and a large number of commercial GPU chips imported from abroad are used in display control systems in various fields.
Especially in the military field, foreign imported commercial GPU chips have poor temperature and environmental adaptability, cannot guarantee that the circuit itself or supporting software has no "back door", contains a large number of redundant functional units that are not needed in the military field, and the power consumption index cannot meet the requirements. Commercial GPU chips are updated quickly, facing production stoppages and outages at any time, making it difficult to meet defects such as continuous support of weapons and equipment, and there are major hidden dangers in terms of safety, reliability, and support.
Moreover, due to political, military, economic and other reasons, foreign countries have implemented technology "blockade" and product "monopoly" on my country, making it difficult to obtain the underlying technical information of GPU chips, such as register information, detailed internal micro-architecture, core software source code, etc., resulting in GPU functions and performance cannot be fully utilized, and the portability is poor; the above problems seriously restrict the independent research and development of display systems in my country

Method used

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  • A Graphics Processor Unified Coloring Array Low Power Gated Clock

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Embodiment

[0030] Such as figure 1 As shown, the dyeing task scheduling unit monitors the current usage of task site resources in the unified dyeing array, and when one or several dyer clusters are idle for a long time, the corresponding bit in the clock gating control register of the unified dyeing array Configured as 0, configure one or several dyer clusters in the busy state to 1 in the corresponding bit of the clock gating control register of the unified dyeing array; The working clock of the cluster will be turned off, ie gated.

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Abstract

The invention relates to the technical field of computer hardware, and discloses a low-power-consumption gated clock of a graphics processor unified dyeing array, comprising: a unified dyeing array module (1), a clock and power consumption control module (2) and a dyeing task scheduling unit ( 3); the unified dyeing array module (1) is composed of at least two dyer clusters, and is responsible for executing vertex or pixel dyeing programs in parallel; the clock and power consumption control module (2) is responsible for generating each function in the graphics processor The working clock of the module, and the clock gating function of each dyer cluster; the dyeing task scheduling unit (3) is responsible for scheduling the vertex and pixel dyeing tasks, and determines which dyer cluster a certain vertex or pixel dyeing program is on to process.

Description

technical field [0001] The invention relates to the technical field of computer hardware, in particular to a graphics processor unified dyeing array low-power consumption gate clock. Background technique [0002] With the continuous increase of graphics applications, the early solution of graphics rendering by CPU alone has been difficult to meet the graphics processing needs of performance and technology growth, and the graphics processing unit (Graphic Processing Unit, GPU) came into being. Since the release of the first GPU product by Nvidia in 1999, the development of GPU technology has mainly gone through the fixed-function pipeline stage, the stage of separating the dyer architecture, and the stage of unified dyer architecture. Rendering gradually extends to the field of general computing. The high-speed, parallel features and flexible programmability of the GPU pipeline provide a good operating platform for graphics processing and general parallel computing. [0003...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06T1/20
CPCG06T1/20
Inventor 张骏郑新建任向隆韩立敏刘航
Owner XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA