Circuit and method for updating FPGA configuration data

Abstract

The invention provides a circuit for updating FPGA configuration data. The circuit comprises a capsule, wherein the interior of the capsule comprises at least one storage unit and a controller unit, and the controller unit is connected to the storage unit; and comprises a JTAG processing circuit, a storage control circuit, a configuration control circuit, a storage control switching circuit, a version switching control circuit, and a re-input data receiving and transmitting circuit. Because the control unit structure in the circuit is improved, only FPGA is matched with a chip of the circuit,so the configured code re-input and the configured code version switching of the FPGA can be completed, additional components and parts are not needed, and the hardware overhead of a system is reduced.

Description

technical field [0001] The present disclosure relates to the field of FPGA (Field Programmable Gate Array, Field Programmable Gate Array), in particular to a circuit and method for upgrading FPGA configuration data. Background technique [0002] Due to the excellent flexibility and versatility of FPGA, it has been increasingly widely used in aerospace equipment, small satellites and other fields. Among them, the most widely used is the SRAM (Static Random Access Memory, static random access memory) type FPGA, that is, the SRAM array is used inside the FPGA chip to store the configuration bitstream (bitstream, configuration bitstream, referred to as code) information of the FPGA. Defines the chip functionality of the FPGA. [0003] Since SRAM is a volatile memory, SRAM FPGA will lose all its configuration information after power off. Therefore, in the actual FPGA application system, the FPGA configuration code is generally stored in another EEPROM, PROM or other non-volatile...

AI Technical Summary

Problems solved by technology

[0005] 1. After the satellite is assembled and the entire satellite is closed, it becomes very difficult or even impossible to modify the data in the PROM; if it is necessary to modify and update the data in the PROM after the entire satellite is closed due to mission requirements, It is often necessary to reserve the JTAG connection line and the corresponding interface, which will make the system development more complicated;

[0006] 2. After the satellite is launched, the data in the PROM can no longer be updated, which means that the FPGA can only load fixed codes that have been solidified in the PROM, and cannot update the functions of the FPGA.

[0007] In order to overcome the above-mentioned defects, engineers and technicians in the field have carried out a lot of related work; around the topic of FPGA coding upgrade, some researchers use the baseboard management controller as the controller unit to update the memory stored in the Flash memory. The FPGA configuration file can be used to update the FPGA configuration, but this solution needs to use more circuit units, which will increase the weight of the circuit system and increase the complexity of the system; and this method cannot support multiple versions at the same time. For the data in the memory, FPGA can only obtain a new configuration code; some technicians use FPGA and two configuration units, the FPGA chip controls the state holder and electronic switch of the configuration unit, and receives the configuration from the host computer or remote equipment data and write the configuration data into the memory, but this solution requires 2 configuration units, the circuit complexity is high, it takes up more circuit board area, and the system weighs more; and the 2 configuration units can only save 2 versions of the design configuration. code, does not support more versions of the code

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