Pipeline analog-to-digital converter and method of operation thereof

Abstract

The application discloses a pipeline analog-to-digital converter and an operation method thereof. Pipeline ADCs include multiplying DACs and sub-ADCs. The multiplying digital-to-analog converter operates alternately in an amplifying stage and a sampling stage according to two non-overlapping clocks, and operates on an input signal according to a target voltage in the amplifying stage. The target voltage is determined by the digital code. The sub-analog-to-digital converter includes: a plurality of comparators, used to compare input signals with a plurality of preset voltages to generate a plurality of comparison results; a judgment circuit, based on the plurality of comparison results in the two clock pulses A non-overlapping interval generates a plurality of comparison completion signals, and the plurality of comparison completion signals respectively indicate whether the plurality of comparators have completed the comparison; and an encoding circuit, according to the plurality of comparison results and the plurality of comparison completions The signal determines the digital code.

Description

technical field [0001] The present disclosure relates to an analog-to-digital converter (analog-to-digital converter, ADC), and more particularly to a pipelined ADC (also referred to as pipeline ADC). Background technique [0002] figure 1 It is an existing pipelined analog-to-digital converter 100 , which includes a plurality of cascaded operation stages 110 , a terminal analog-to-digital converter 120 and a digital correction circuit 130 . input signal V in After multi-stage comparison, subtraction and amplification operations, the correction circuit 130 corrects the output of each operation stage 110 and the output of the terminal analog-to-digital converter 120 to generate a digital code D, which is the input signal V in The result of analog-to-digital conversion. The operation principle of the pipelined ADC 100 is well known to those skilled in the art, so it will not be repeated here. [0003] The arithmetic stage 110 includes a sub-analog-to-digital converter (su...

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Problems solved by technology

This instantaneous voltage change can easily cause voltage disturbances on the capacitors C1a and C1b, and this voltage disturbance will cause unexpected voltage changes at the input terminals of the operational amplifier 310 through the switches S4a and S4b, thereby making the output voltage of the operational amplifier 310 in an extremely unstable state

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