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Preparation method of three-dimensional memory, and trench bottom etching method

A memory and three-dimensional technology, applied in the field of memory, can solve the problems affecting the filling effect of the subsequent tungsten wall, and achieve good process effect, good performance and good effect

Active Publication Date: 2018-09-18
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, due to the difference in etching rate, after the above etching process is completed, a raised structure similar to a step (hereinafter referred to as a step) is easily formed at the opening of the trench, which will affect the filling effect of the subsequent tungsten wall.

Method used

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  • Preparation method of three-dimensional memory, and trench bottom etching method
  • Preparation method of three-dimensional memory, and trench bottom etching method
  • Preparation method of three-dimensional memory, and trench bottom etching method

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preparation example Construction

[0052] First reference Figure 1-4 A non-limiting example of the preparation method of the three-dimensional memory provided by the present invention will be described. In the current non-limiting example, the method for preparing a three-dimensional memory provided by the present invention includes the following steps:

[0053] Step 100, such as figure 1 As shown, a trench is made. In the current embodiment, the trench is formed on a semiconductor structure. Such as figure 2 As shown, the semiconductor structure is formed by forming a stack 9 on the substrate 1. The laminated layer 9 includes a plurality of conductor layers 7 and insulating layers 6. The first direction is defined as a direction perpendicular to the surface of the substrate 1. In the current embodiment, the specific arrangement of the conductor layer 7 and the insulating layer 6 in the laminate 9 is that a plurality of conductor layers 7 and a plurality of insulating layers 6 are alternately stacked along th...

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Abstract

The invention relates to a preparation method of a three-dimensional memory, which comprises the following steps: laminating, forming a memory string, forming a trench, removing a first insulating layer in the lamination; forming a barrier layer conformally in the vacancy left after the trench and the insulating layer are removed; filling a conductor material into the vacancy to form a conductivelayer; forming a spacer layer conformally in the trench; performing a first etching process to remove the barrier layer and the spacer layer at the bottom of the trench; performing a second etching process so that the etching rate of the barrier layer is the same as that of the spacer layer. According to the preparation method of the three-dimensional memory provided by the present invention, thesecond etching process is achieved and the etching rate of the barrier layer is the same as that of the silicon oxide layer in the second etching process, so that production of steps at the opening ofthe trench can be well suppressed, and further a high-performance common source contact is obtained.

Description

Technical field [0001] The invention mainly relates to the technical field of memory, in particular to a method for preparing a three-dimensional memory and an etching method for the bottom of a trench. Background technique [0002] With the continued emphasis on highly integrated electronic devices, there is a continuing demand for semiconductor memory devices that operate at higher speeds and lower powers and have increased device densities. To achieve this goal, devices with smaller sizes and multilayer devices with transistor cells arranged in horizontal and vertical arrays have been developed. 3D NAND is an emerging type of flash memory developed in the industry. It solves the limitations of 2D or planar NAND flash memory by vertically stacking multiple layers of data storage cells. It has excellent accuracy and supports higher storage in a smaller space. The storage capacity can create storage devices with storage capacity several times higher than similar NAND technology,...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/115H01L27/11514H10B69/00H10B53/20
CPCH10B53/20H10B69/00
Inventor 乐陶然邵克坚程强刘欢郭玉芳陈世平张彪陈保友
Owner YANGTZE MEMORY TECH CO LTD