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A five-stage three-level inverter svpwm modulation algorithm

A technology of three-level inverter and modulation algorithm, which is applied in the direction of electrical components, AC power input conversion to DC power output, output power conversion devices, etc.

Inactive Publication Date: 2020-04-07
DALIAN UNIV OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The SVPWM algorithm of the traditional three-level inverter proposed on the basis of the space vector control of the two-level inverter involves more trigonometric function operations and calculations in terms of judging the sector of the reference vector and calculating the action time of the basic vector. Table queries, these operations put a lot of burden on the controller

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  • A five-stage three-level inverter svpwm modulation algorithm
  • A five-stage three-level inverter svpwm modulation algorithm
  • A five-stage three-level inverter svpwm modulation algorithm

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Embodiment Construction

[0077] The specific implementation manners of the present invention will be further described below in conjunction with the accompanying drawings and technical solutions.

[0078] figure 1 , each phase of the inverter can output U according to different switch combinations dc / 2, 0, -U dc / 2 three levels. The switching states corresponding to the three output levels are called P, O, and N, respectively. Taking phase A as an example, the P state means that the switch state of this phase is [1 1 00], and the output voltage corresponds to the DC side capacitor C 1 voltage, that is, the output voltage is U dc / 2; O state means that the switch state of this phase is [0 1 10], the output voltage corresponds to point O on the DC side, that is, the output voltage is 0; N state means that the phase switch state is [0 0 1 1], and the output voltage corresponds to the DC side Capacitance C 2 voltage, that is, the output voltage is U dc / 2.

[0079] The three-phase voltages differ...

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Abstract

The invention discloses a five-stage three-level inverter SVPWM modulation algorithm. The algorithm comprises four parts of a T-type three-level inverter including a main circuit, vector solution, generation of SVPWM waveform and common mode current suppression. The five-stage three-level inverter SVPWM modulation algorithm includes three steps of region judgment of a reference voltage vector Vref, space voltage vector selection and action time and determination of space voltage vector action sequence. The method adopts a five-stage modulation technique to generate the required space vector pulse width modulation waveform, according to different common mode voltages corresponding to voltage vectors, it is achieved that the output waveform quality is good and the common mode voltages are suppressed through reasonable arrangement of the small vector action sequence and the action time, and simulation results show that the algorithm can eliminate a sector judgment process, reduce the computational workload, and suppress the common mode voltages under the premise of ensuring the quality of the output waveform.

Description

technical field [0001] The invention relates to a SVPWM method for a three-level inverter, in particular to a SVPWM method for a three-level inverter under a 60° coordinate system. Background technique [0002] In recent years, in large-capacity converters, compared with two-level inverters, T-type three-level inverters have an output voltage closer to a sine wave, a small voltage change rate, low switching frequency, low loss, and high efficiency. High-level features have attracted widespread attention. The output performance of the three-level inverter mainly depends on the modulation algorithm. The SVPWM technology is widely used in the three-level inverter because of its easy digital implementation and high voltage utilization. The SVPWM algorithm of the traditional three-level inverter proposed on the basis of the space vector control of the two-level inverter involves more trigonometric and Table query, these operations bring a lot of burden to the controller. Cont...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H02M7/487H02M7/5387
CPCH02M7/487H02M7/5387
Inventor 张莉卢晓杰孙俊斌
Owner DALIAN UNIV OF TECH
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