Distributed network clock synchronization method

A distributed network and clock synchronization technology, applied in the field of electronics and communication, can solve the problems of different time signal delay, unable to achieve synchronization accuracy, insufficient us-level time accuracy, etc., and achieve strong robustness and reliable time synchronization scheme. Effect

Inactive Publication Date: 2018-10-12
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, this timing method can only meet the requirements of medium-precision time users due to the different delays of time signals transmitted to different terminals through channels, that is, it can only meet the requirements of time synchronization accuracy at the ms level
However, in the field of industrial control, s

Method used

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Experimental program
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Embodiment 1

[0051] See figure 1 , figure 1 It is a flowchart of a distributed network clock synchronization method provided by an embodiment of the present invention. The clock synchronization method of the present invention can be used for clock synchronization of a distributed network, and is applied to a distributed network. Specifically, the method includes the following steps:

[0052] Step 1. Determine the master device and the slave device through the clock selection algorithm;

[0053] Step 2, measuring the link delay between the master device and the slave device;

[0054] Step 3, acquiring the time difference between the master device and the slave device through the link delay;

[0055] Step 4. Complete the clock synchronization of the slave device through the master device and the time difference.

[0056] Among them, before step 1, it may also include:

[0057] Step X1, judging whether each device in the distributed network supports the clock synchronization protocol;

...

Embodiment 2

[0090] See figure 2 , figure 2 It is a schematic diagram of the implementation flow of a distributed network clock synchronization method provided by the embodiment of the present invention; image 3 It is a schematic diagram of the principle of measuring link delay of a distributed network clock synchronization method provided by the embodiment of the present invention; Figure 4 It is a schematic diagram of a clock synchronization principle of a distributed network clock synchronization method provided by an embodiment of the present invention. This embodiment further describes the clock synchronization method in detail on the basis of the foregoing embodiments. Specifically, the method includes the following steps:

[0091] Step 1. Send and receive messages

[0092] Each node in the distributed network is a time-aware system, and each time-aware system corresponds to a device, each device. When each node in the distributed network is powered on, that is, after each d...

Embodiment 3

[0116] A distributed network is formed by the interconnection of node machines distributed in different locations and having multiple terminals. Any point in the network is connected to at least two lines. When any line fails, the communication can be completed through other links, which has high reliability. At the same time, the network is easy to expand.

[0117]Preferably, all nodes in the distributed network constitute a clock synchronization system domain, and all nodes in the domain include clock sources, bridges and end stations respectively, wherein the number of clock sources is one, and the number of end stations is at least one, The number of bridges is at least one. Each node in the distributed network is a time-aware system, that is, clock sources, bridges and end stations are all time-aware systems.

[0118] Preferably, the time awareness system includes: a synchronous site synchronous site module (Sitesync), a first port (portsync 1), a second port (portsync 2...

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Abstract

The invention relates to a distributed network clock synchronization method. The distributed network clock synchronization method is applied to a distributed network, and comprises the steps of: determining a master device and a slave device through a clock selection algorithm; measuring the link delay of the master device and the slave device; obtaining the time difference of the master device and the slave device through the link delay; and completing clock synchronization of the slave device through the master device and the time difference. According to the embodiment of the invention, thelink delay is measured; furthermore, the time difference is calculated through the link delay; then, clock synchronization is realized; therefore, the clock synchronization precision of the distributed network is up to the nanosecond level; furthermore, the distributed network has relatively high stability; namely, when the equipment in the distributed network is abnormal, the distributed networkcan adaptively adjust the network structure within a short time; a proper master clock is re-selected; and furthermore, clock synchronization is completed.

Description

technical field [0001] The invention belongs to the field of electronics and communication, and in particular relates to a distributed network clock synchronization method. Background technique [0002] With the development of modern information technology, various application control devices are gradually becoming distributed, intelligent, and networked, and the accuracy requirements for network clock synchronization are getting higher and higher. Network clock synchronization can provide high-precision time and frequency synchronization signals for telecommunications, mobile communication base stations, PHS base stations, GSM network optimization and other systems. Therefore, its synchronization ability has been widely valued, and it is a key technology in the research and development of many network systems. [0003] Traditional distributed network clock synchronization is realized by using NTP (Network Time Protocol) transmission mode, that is, to transmit unified and s...

Claims

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Application Information

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IPC IPC(8): H04J3/06
CPCH04J3/0638H04J3/0641H04J3/0682
Inventor 陈晨吕宁殷廷瑞吕高登张子豪郑昊
Owner XIDIAN UNIV
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