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Assembly line subdivision device for improving main frequency of processor

A processor and assembly line technology, applied in the direction of machine execution devices, electrical digital data processing, instruments, etc., can solve the problem of processor main frequency loss and other problems, achieve the effect of small branch overhead, low design complexity, and avoid suffering losses

Active Publication Date: 2018-11-20
XIAN MICROELECTRONICS TECH INST
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  • Claims
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Problems solved by technology

After retrieving relevant patents and literature, in the face of the problem of the loss of the main frequency of the processor caused by the increase of the Cache capacity, there is still no easy-to-control pipeline subdivision method

Method used

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  • Assembly line subdivision device for improving main frequency of processor
  • Assembly line subdivision device for improving main frequency of processor
  • Assembly line subdivision device for improving main frequency of processor

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Embodiment Construction

[0019] The technical solution of the present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0020] The invention provides a pipeline subdivision device for increasing the main frequency of the processor, such as figure 1 As shown, it is a nine-stage pipeline structure. According to its connection sequence, it is as follows: instruction cache access level (F1), instruction cache selection level (F2), decoding level (D), register access level (A), execution level ( E), data cache access level (M1), data cache selection level (M2), exception handling level (X) and data write-back level (W). Compared with the existing seven-stage pipeline, the present invention divides the original fetching stage (F) into an instruction cache access stage (F1) and an instruction cache selection stage (F2), and divides the original memory access stage (M) It is divided into data cache access level (M1) and data cache selection le...

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Abstract

The invention discloses an assembly line subdivision device for improving main frequency of a processor. The connection order of the device is an instruction Cache access level, an instruction Cache selection level, a decoding level, a register access level, an execution level, a data Cache access level, a data Cache selection level, an exception handling level and a data write-back level in sequence. By reducing access delay of an on-chip cache, the assembly line subdivision of the main frequency of the processor is improved, so as to meet practical application requirements that the main frequency of the processor can be increased without increasing Cache capacity, or main frequency of the processor is not lost after increasing the Cache capacity.

Description

technical field [0001] The invention belongs to the technical field of processor main frequency, and in particular relates to a pipeline subdivision device for increasing the main frequency of a processor. Background technique [0002] In order to increase the main frequency of the microprocessor, there are two major technical approaches at present: the selection of advanced manufacturing technology and the improvement of the architecture of the microprocessor. (1) In terms of manufacturing process technology, the smaller the process size, the faster the transistor speed, and the resulting higher processor frequency. Typical mature commercial semiconductor manufacturing processes include 65nm, 40nm, 28nm, etc. Various sizes. However, the use of smaller and more advanced manufacturing processes will result in higher tape-out costs; secondly, as the size of the manufacturing process is further reduced, the technical difficulty that needs to be broken through is also increasin...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/38
CPCG06F9/3806G06F9/383G06F9/3867Y02D10/00
Inventor 肖建青张洵颖李红桥赵翠华崔媛媛
Owner XIAN MICROELECTRONICS TECH INST
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