An error location method and system based on RTL-level power consumption analysis

Abstract

The invention discloses a method and system for locating errors based on RTL-level power consumption analysis. The method steps include obtaining an executable DUT of a design under test, a reference design REF and a set of test cases, running the test cases in sequence, and performing a test on the DUT of the design under test and the test case set. The reference design REF conducts power consumption evaluation separately to obtain the power consumption under specific test stimuli, compares and analyzes the power consumption results, and performs power consumption defect errors layer by layer according to the power consumption comparison results of the design Location analysis; verify the accuracy of the power consumption defect located in the DUT of the tested design; feedback the dislocation report of the power consumption defect to the designer. The invention can not only overcome the limitation that the mainstream verification technology can only locate functional errors in the design, but also can make up for the shortcomings of low power consumption optimization space and long design iteration cycle in the physical design stage, and can realize early positioning in the microprocessor logic design stage Power consumption defect function.

Description

technical field [0001] The invention relates to the field of low power consumption verification of microprocessors, in particular to an error location method and system based on RTL-level power consumption analysis. Background technique [0002] As the core of various modern computer equipment, microprocessor chips lead the rapid development of integrated circuits and information technology in the industry. With the continuous development of semiconductor technology and the continuous improvement of chip performance requirements, the integration of chip systems is getting higher and higher, and the design of microprocessors is facing a series of problems and challenges. The sharply rising power consumption has become a crucial issue. . On the one hand, due to the heat dissipation and power noise caused by the power consumption of the microprocessor, it affects the packaging, testing and system reliability of the chip; on the other hand, due to the shortage of energy and the...

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Problems solved by technology

[0006] Technical problem to be solved by the present invention: Aiming at the above-mentioned problems of the prior art, an error location method and system based on RTL-level power consumption analysis is provided. The present invention can realize power consumption analysis and power consumption defects in the early stage of microprocessor chip design Processes such as positioning and verification greatly shorten the design iteration time, break through the limitations of mainstream verification technologies such as simulation verification, formal verification and other methods that cannot verify power consumption defects, and make up for the small space for power consumption optimization in the physical design stage and design iteration time Insufficient to meet the expected low-power design requirements and goals with faster speed and higher efficiency

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