SDH data processing method and system and related devices
A data processing system and data processing technology, applied in the field of multi-rate compatible devices, systems, computer-readable storage media and data processing equipment, and SDH data processing methods, can solve flexibility discount, difficulty in hardware design, and inability to achieve high density POS interface and other issues to achieve the effect of enhanced flexibility and a wide range of use scenarios
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Embodiment 1
[0052] The following combination image 3 , image 3 A flow chart of an SDH data processing method provided in the embodiment of the present application, which specifically includes the following steps:
[0053] S101: Receive input serial single-bit SDH data;
[0054] This step is to receive the high-speed serial single-bit SDH data input by the optical port SFP+ (an interface device that converts 10 Gigabit optical signals into electrical signals).
[0055] S102: Process the serial single-bit SDH data by using oversampling technology to obtain parallel multi-bit SDH data;
[0056] On the basis of S101, this step aims to use the oversampling technology to perform oversampling processing on the received serial single-bit SDH to obtain parallel multi-bit SDH data, wherein the maximum number of bits of the parallel multi-bit SDH data is 64 , its corresponding level is STM-64, the interface transmission rate is 10G parallel SDH data, correspondingly, if the corresponding level ...
Embodiment 2
[0068] The following combination Figure 4 , Figure 4 The flowchart of another SDH data processing method provided by the embodiment of the present application. On the basis of the first embodiment, this embodiment provides a method for how to perform interface rate matching through S204 and S205, and also provides the method through S206. A method for avoiding the subsequent interface rate matching process by marking the target STM level is proposed. It should be noted that these two preferred methods can be based on the embodiment 1 alone to obtain a single combined embodiment, and can also be freely combined to form For a more complex embodiment with a better implementation solution, this embodiment only exists as an embodiment that includes the above two preferred solutions at the same time, and the specific implementation steps are as follows:
[0069] S201: Receive input serial single-bit SDH data;
[0070] S202: Process the serial single-bit SDH data by using an over...
Embodiment 3
[0080] see below Figure 5 , Figure 5 A structural block diagram of an SDH data processing system provided in the embodiment of the present application, the SDH data processing system may include:
[0081] Single bit SDH data receiving unit 100, for receiving the serial single bit SDH data of input;
[0082] The oversampling unit 200 is used to process the serial single-bit SDH data using oversampling technology to obtain parallel multi-bit SDH data; wherein, the maximum number of bits of the parallel multi-bit SDH data is 64 bits;
[0083] Splitting unit 300 according to STM level is used for resampling respectively according to the data transmission rate corresponding to each STM level, and obtains parallel SDH data after each split corresponding to each STM level;
[0084] The target interface rate matching unit 400 is configured to perform interface rate matching on each split parallel SDH data by using the frame synchronization code group to obtain the target parallel ...
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