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Surge protector and manufacturing method thereof

A technology for surge protectors and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve the problems of increasing layout area, increasing triodes and thyristors, etc., to reduce interference problems, reduce Effect of layout area

Inactive Publication Date: 2019-01-04
WILL SEMICON (SHANGHAI) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The technical problem to be solved by the present invention is to overcome the defect in the prior art that reducing the interference problem by increasing the distance between the triode and the thyristor is at the cost of sacrificing the surge capability and increasing the layout area, and providing a surge protector and its production method

Method used

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  • Surge protector and manufacturing method thereof
  • Surge protector and manufacturing method thereof
  • Surge protector and manufacturing method thereof

Examples

Experimental program
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Embodiment 1

[0052] Such as figure 1 As shown, the surge protector of this embodiment includes a plurality of protection units, and each protection unit includes a triode, a thyristor and a diode. Specifically, see figure 2 , the thyristor includes an N-type semiconductor substrate 1 (ie figure 2 In the n-substrate), the first P-type well 2 (ie figure 2 in the second PW), the first N-type well 3 (ie figure 2 NWL+NPS in), the second P-type well 4 (ie figure 2 in the PWB) and the second N-type well 5 (ie figure 2 NW in). The top of the N-type semiconductor substrate 1 (that is, the front of the surge protector) is provided with a first groove, and the first P-type well 2 is arranged in the first groove, and the first P-type well is used as the trigger of the thyristor. Area. The first N-type well 3 is arranged in the first P-type well 2, and the first N-type well is used as a cathode region of a thyristor. The bottom of the N-type semiconductor substrate 1 (that is, the back si...

Embodiment 2

[0057] Such as Figure 10 As shown, the manufacturing method of the surge protector of this embodiment includes the following steps:

[0058] Step 101, making a first groove on the top of the N-type semiconductor substrate, and setting a first P-type well in the first groove; making a second groove at the bottom of the N-type semiconductor substrate, and in the second groove A second P-type well is provided.

[0059] Wherein, the second groove is located below the first groove. The first P-type well is used as a trigger region of the thyristor, and the second P-type well is used as an anode region of the thyristor. A through hole is provided on the second P-type well along the width direction of the cross-section of the second P-type well.

[0060] Step 102 , performing N pre-deposition treatment or N ion implantation treatment in the first P-type well and the through hole respectively.

[0061] Step 103 , performing N high-temperature diffusion treatment in the first P-ty...

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Abstract

The invention discloses a surge protector and a manufacturing method thereof. The surge protector comprises a thyristor, wherein the thyristor comprises an N-type semiconductor substrate, a first P-type well, a first N-type well, a second P-type well and a second N-type well; the top of the N-type semiconductor substrate is provided with a first groove, the first P-type well is arranged in the first groove, and the first N-type well is arranged in the first P-type well; the first N-type well serves as a cathode region of the thyristor; the bottom of the N-type semiconductor substrate is provided with a second groove, the second groove is positioned below the first groove, and the second P-type well is positioned in the second groove; the second P-type well is provided with a through hole along the width direction of the cross section of the second P-type well, and the second N-type well is arranged in the through hole; and when the thyristor is turned on, the second N-type well is usedfor collecting electrons emitted from the cathode region. The invention can effectively reduce the problem of interference between the transistor and the thyristor, and greatly reduces the layout area of the surge protector.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a surge protector and a manufacturing method thereof. Background technique [0002] SPD (surge protector) is used for surge and electrostatic protection of signal transmission lines. It has the characteristics of simple design, high anti-surge and electrostatic capacity, and stable performance. In the prior art, the triac and the thyristor of the SPD are realized on one wafer, and there is a problem of opening and closing interference between each other. At present, in order to alleviate the interference problem, the general practice is to separate the triode and the thyristor as much as possible. However, if the distance between the triode and the thyristor is set relatively large, although the interference problem is relatively alleviated, the area of ​​the layout is wasted, the surge capability of the device is significantly sacrificed, and the cost of the chip will in...

Claims

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Application Information

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IPC IPC(8): H01L27/02H01L29/06H01L29/74H01L21/8222H01L21/332
CPCH01L21/8222H01L27/0255H01L27/0259H01L27/0296H01L29/0684H01L29/66371H01L29/7412
Inventor 胡勇海纪刚诸舜杰钟添宾顾建平
Owner WILL SEMICON (SHANGHAI) CO LTD
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