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Semiconductor structure and forming method thereof

A technology of semiconductor and gate structure, which is applied in the field of semiconductor structure and its formation, and can solve the problems that the electrical performance of fin field effect transistors needs to be further improved.

Active Publication Date: 2019-03-05
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the electrical performance of fin field effect transistors formed in the prior art needs to be further improved

Method used

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  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof

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Experimental program
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Embodiment Construction

[0030] It can be known from the background art that the performance of the semiconductor structure formed in the prior art needs to be improved. The reason is now analyzed in combination with the method for forming the semiconductor structure.

[0031] refer to figure 1 , is a schematic diagram of a cross-sectional structure corresponding to a step in the formation process of a semiconductor structure.

[0032] The method for forming the semiconductor structure includes: figure 1 As shown, a substrate 10 is provided, and fins 11 located on the substrate 10 are formed. The substrate 10 includes a first region A for forming an N-type transistor and a second region B for forming a P-type transistor. ; forming a gate structure across the fin 11, the gate structure covering part of the sidewall and part of the top surface of the fin 11; forming a stress layer in the fin 11 on both sides of the gate structure , the stress layer located in the first area A is the first stress laye...

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PUM

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Abstract

The invention discloses a semiconductor structure and a forming method thereof. After a stress layer is formed in fin parts on the two sides of a gate structure, a barrier layer is formed on a side wall of the gate structure, and then first ion implantation is performed on the fin parts below the stress layer to form a doping region. The depth of the ion implantation is relatively high, so that relatively high ion implantation energy is needed. The barrier layer blocks the ion implantation close to the two sides of the gate structure, so that the damage of relatively high ion implantation energy to the gate structure is avoided, and the performance of the formed semiconductor structure is improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher component density and higher integration. As the most basic semiconductor device, transistors are currently being widely used. Therefore, with the increase in the density and integration of semiconductor devices, the gate size of planar transistors is also getting smaller and smaller. The ability of traditional planar transistors to control channel currents has become Weak, short channel effect occurs, leakage current increases, and ultimately affects the electrical performance of semiconductor devices. [0003] In order to further reduce the size of MOSFET devices, people have developed multi-side gate field effect transistor structures to improve the controllabil...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8238H01L21/266H01L27/092
CPCH01L21/266H01L21/823814H01L21/823821H01L27/0924H01L29/66803H01L21/2652H01L29/6656H01L29/7848H01L29/165H01L29/7856H01L21/76832H01L21/31155H01L29/7842H01L21/0337H01L29/0847
Inventor 周飞
Owner SEMICON MFG INT (SHANGHAI) CORP